MLK-16062-1: Fix PXL mipi csi0/1 clock gate register address
authorSandor Yu <Sandor.yu@nxp.com>
Thu, 27 Jul 2017 10:21:56 +0000 (18:21 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:36:11 +0000 (15:36 -0500)
mipi csi0/1 clock gate register address swapped.
It will cause mipi csi0/1 failed to work.

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
include/soc/imx8/imx8qm/lpcg.h
include/soc/imx8/imx8qxp/lpcg.h

index c26c3b4..512953e 100644 (file)
 #define IMG_PXL_LINK_DC1_LPCG  0x585C0000
 #define IMG_PXL_LINK_DC0_LPCG  0x585B0000
 #define IMG_PXL_LINK_HDMI_LPCG 0x585A0000
-#define IMG_PXL_LINK_CSI0_LPCG 0x58590000
-#define IMG_PXL_LINK_CSI1_LPCG 0x58580000
+#define IMG_PXL_LINK_CSI1_LPCG 0x58590000
+#define IMG_PXL_LINK_CSI0_LPCG 0x58580000
 #define IMG_PDMA_7_LPCG                        0x58570000
 #define IMG_PDMA_6_LPCG                        0x58560000
 #define IMG_PDMA_5_LPCG                        0x58550000
index 061454f..cb06b03 100644 (file)
@@ -99,8 +99,8 @@
 #define IMG_PXL_LINK_DC1_LPCG  0x585C0000
 #define IMG_PXL_LINK_DC0_LPCG  0x585B0000
 #define IMG_PXL_LINK_HDMI_LPCG 0x585A0000
-#define IMG_PXL_LINK_CSI0_LPCG 0x58590000
-#define IMG_PXL_LINK_CSI1_LPCG 0x58580000
+#define IMG_PXL_LINK_CSI1_LPCG 0x58590000
+#define IMG_PXL_LINK_CSI0_LPCG 0x58580000
 #define IMG_PDMA_7_LPCG                        0x58570000
 #define IMG_PDMA_6_LPCG                        0x58560000
 #define IMG_PDMA_5_LPCG                        0x58550000