mipi csi0/1 clock gate register address swapped.
It will cause mipi csi0/1 failed to work.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
#define IMG_PXL_LINK_DC1_LPCG 0x585C0000
#define IMG_PXL_LINK_DC0_LPCG 0x585B0000
#define IMG_PXL_LINK_HDMI_LPCG 0x585A0000
-#define IMG_PXL_LINK_CSI0_LPCG 0x58590000
-#define IMG_PXL_LINK_CSI1_LPCG 0x58580000
+#define IMG_PXL_LINK_CSI1_LPCG 0x58590000
+#define IMG_PXL_LINK_CSI0_LPCG 0x58580000
#define IMG_PDMA_7_LPCG 0x58570000
#define IMG_PDMA_6_LPCG 0x58560000
#define IMG_PDMA_5_LPCG 0x58550000
#define IMG_PXL_LINK_DC1_LPCG 0x585C0000
#define IMG_PXL_LINK_DC0_LPCG 0x585B0000
#define IMG_PXL_LINK_HDMI_LPCG 0x585A0000
-#define IMG_PXL_LINK_CSI0_LPCG 0x58590000
-#define IMG_PXL_LINK_CSI1_LPCG 0x58580000
+#define IMG_PXL_LINK_CSI1_LPCG 0x58590000
+#define IMG_PXL_LINK_CSI0_LPCG 0x58580000
#define IMG_PDMA_7_LPCG 0x58570000
#define IMG_PDMA_6_LPCG 0x58560000
#define IMG_PDMA_5_LPCG 0x58550000