drm/i915/gen9: Make power well disabling synchronous

So far we only power well enabling was synchronous not disabling. Since
we don't exactly know how the firmware (both DMC and PCU) synchronizes
against the actual power well state during DC transitions, make the
disabling also synchronous.

CC: Mika Kuoppala <mika.kuoppala@linux.intel.com>
CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459515767-29228-6-git-send-email-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8ad67df..4b8166d 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -722,10 +722,6 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
 
                if (!is_enabled) {
                        DRM_DEBUG_KMS("Enabling %s\n", power_well->name);
-                       if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) &
-                               state_mask), 1))
-                               DRM_ERROR("%s enable timeout\n",
-                                       power_well->name);
                        check_fuse_status = true;
                }
        } else {
@@ -739,6 +735,11 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
                        gen9_sanitize_power_well_requests(dev_priv, power_well);
        }
 
+       if (wait_for(!!(I915_READ(HSW_PWR_WELL_DRIVER) & state_mask) == enable,
+                    1))
+               DRM_ERROR("%s %s timeout\n",
+                         power_well->name, enable ? "enable" : "disable");
+
        if (check_fuse_status) {
                if (power_well->data == SKL_DISP_PW_1) {
                        if (wait_for((I915_READ(SKL_FUSE_STATUS) &