sunxi: fix ACTLR.SMP assembly routine
authorAndre Przywara <andre.przywara@arm.com>
Thu, 16 Feb 2017 01:20:18 +0000 (01:20 +0000)
committerJagan Teki <jagan@amarulasolutions.com>
Wed, 5 Apr 2017 09:33:17 +0000 (15:03 +0530)
If we take the liberty to use register r0 to perform our bit set, we
should be nice enough to tell the compiler about it.
Add r0 to the clobber list to avoid potential mayhem.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jagan Teki <jagan@openedev.com>
arch/arm/mach-sunxi/board.c

index 52be5b0..58fbacb 100644 (file)
@@ -188,7 +188,8 @@ void s_init(void)
        asm volatile(
                "mrc p15, 0, r0, c1, c0, 1\n"
                "orr r0, r0, #1 << 6\n"
-               "mcr p15, 0, r0, c1, c0, 1\n");
+               "mcr p15, 0, r0, c1, c0, 1\n"
+               ::: "r0");
 #endif
 #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3
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