arm64: mm: Invalidate both kernel and user ASIDs when performing TLBI
authorWill Deacon <will.deacon@arm.com>
Thu, 10 Aug 2017 13:13:33 +0000 (14:13 +0100)
committerHaibo Chen <haibo.chen@nxp.com>
Thu, 12 Apr 2018 10:46:04 +0000 (18:46 +0800)
commit 9b0de864b5bc upstream.

Since an mm has both a kernel and a user ASID, we need to ensure that
broadcast TLB maintenance targets both address spaces so that things
like CoW continue to work with the uaccess primitives in the kernel.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Laura Abbott <labbott@redhat.com>
Tested-by: Shanker Donthineni <shankerd@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Alex Shi <alex.shi@linaro.org>
arch/arm64/include/asm/tlbflush.h

index 2855f83..8c4f1b2 100644 (file)
@@ -24,6 +24,7 @@
 #include <linux/sched.h>
 #include <asm/cputype.h>
 #include <soc/imx8/soc.h>
+#include <asm/mmu.h>
 
 /*
  * Raw TLBI operations.
 
 #define __tlbi(op, ...)                __TLBI_N(op, ##__VA_ARGS__, 1, 0)
 
+#define __tlbi_user(op, arg) do {                                              \
+       if (arm64_kernel_unmapped_at_el0())                                     \
+               __tlbi(op, (arg) | USER_ASID_FLAG);                             \
+} while (0)
+
 /*
  *     TLB Management
  *     ==============
@@ -105,8 +111,10 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
        dsb(ishst);
        if (TKT340553_SW_WORKAROUND && ASID(mm) >> 11)
                __tlbi(vmalle1is);
-       else
+       else {
                __tlbi(aside1is, asid);
+               __tlbi_user(aside1is, asid);
+       }
        dsb(ish);
 }
 
@@ -118,8 +126,10 @@ static inline void flush_tlb_page(struct vm_area_struct *vma,
        dsb(ishst);
        if (TKT340553_SW_WORKAROUND && (uaddr >> 36 || (ASID(vma->vm_mm) >> 12)))
                __tlbi(vmalle1is);
-       else
+       else {
                __tlbi(vale1is, addr);
+               __tlbi_user(vale1is, addr);
+       }
        dsb(ish);
 }
 
@@ -151,10 +161,14 @@ static inline void __flush_tlb_range(struct vm_area_struct *vma,
        for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) {
                if (TKT340553_SW_WORKAROUND && (addr & mask || (ASID(vma->vm_mm) >> 12)))
                        __tlbi(vmalle1is);
-               else if (last_level)
+               else if (last_level) {
                        __tlbi(vale1is, addr);
-               else
+                       __tlbi_user(vale1is, addr);
+               }
+               else {
                        __tlbi(vae1is, addr);
+                       __tlbi_user(vae1is, addr);
+               }
        }
        dsb(ish);
 }
@@ -199,8 +213,10 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm,
 
        if (TKT340553_SW_WORKAROUND && (uaddr >> 36 || (ASID(mm) >> 12)))
                __tlbi(vmalle1is);
-       else
+       else {
                __tlbi(vae1is, addr);
+               __tlbi_user(vae1is, addr);
+       }
 
        dsb(ish);
 }