LF-1081 arch: arm64: dts: imx8-cm4: correct INTMUX compatible string and

interrupt specifier

Since upstream change:
commit 2fbb13961e74 ("irqchip: Add NXP INTMUX interrupt multiplexer support")

1. Compatible string change:
	nxp,imx-intmux -> fsl,imx-intmux

2. Two cells needed in interrupt specifier for INTMUX:
	the 1st cell: hw interrupt number
	the 2nd cell: channel index

Fixes: 9d18df5cc1bb (arm64: dts: imx8: cm40: move into a separate ss dtsi)
Fixes: bc431df69ac0 (arch: arm64: imx8qm: add lpi2c and intmux for CM41 subsystem)
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
index 850ba61..e9ae575 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
@@ -22,7 +22,7 @@ cm40_subsys: bus@34000000 {
        cm40_i2c: i2c@37230000 {
                compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
                reg = <0x37230000 0x1000>;
-               interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <9 0>;
                interrupt-parent = <&cm40_intmux>;
                clocks = <&cm40_i2c_lpcg 0>,
                         <&cm40_i2c_lpcg 1>;
@@ -46,7 +46,7 @@ cm40_subsys: bus@34000000 {
        };
 
        cm40_intmux: intmux@37400000 {
-               compatible = "nxp,imx8qxp-intmux", "nxp,imx-intmux";
+               compatible = "fsl,imx8qxp-intmux", "fsl,imx-intmux";
                reg = <0x37400000 0x1000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm41.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm41.dtsi
index 19c38af..d0551f3 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8-ss-cm41.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm41.dtsi
@@ -22,7 +22,7 @@ cm41_subsys: bus@38000000 {
        cm41_i2c: i2c@3b230000 {
                compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
                reg = <0x3b230000 0x1000>;
-               interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <9 0>;
                interrupt-parent = <&cm41_intmux>;
                clocks = <&cm41_i2c_lpcg 0>,
                         <&cm41_i2c_lpcg 1>;
@@ -46,7 +46,7 @@ cm41_subsys: bus@38000000 {
        };
 
        cm41_intmux: intmux@3b400000 {
-               compatible = "nxp,imx8qxp-intmux", "nxp,imx-intmux";
+               compatible = "fsl,imx8qxp-intmux", "fsl,imx-intmux";
                reg = <0x3b400000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,