MLK-13343-2: ARM: dts: imx6sll: enable audio functions

enabled the wm8962 and spdif out.
There is pin conflict between spdif and usdhc2. So add
dedicate spdif dts.

Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 41de4e7..3eff3f6 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -509,7 +509,8 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
        imx6ull-9x9-evk.dtb \
        imx6ull-9x9-evk-btwifi.dtb
 dtb-$(CONFIG_SOC_IMX6SLL) += \
-       imx6sll-lpddr3-arm2.dtb
+       imx6sll-lpddr3-arm2.dtb \
+       imx6sll-lpddr3-arm2-spdif.dtb
 dtb-$(CONFIG_SOC_IMX7D) += \
        imx7d-cl-som-imx7.dtb \
        imx7d-colibri-eval-v3.dtb \

diff --git a/arch/arm/boot/dts/imx6sll-lpddr3-arm2-spdif.dts b/arch/arm/boot/dts/imx6sll-lpddr3-arm2-spdif.dts
new file mode 100644 (file)
index 0000000..39f67da
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sll-lpddr3-arm2-spdif.dts
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6sll-lpddr3-arm2.dts"
+
+/ {
+
+       sound-spdif {
+               compatible = "fsl,imx-audio-spdif",
+                          "fsl,imx6sl-evk-spdif";
+               model = "imx-spdif";
+               spdif-controller = <&spdif>;
+               spdif-out;
+       };
+};
+
+&spdif {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spdif>;
+       assigned-clocks = <&clks IMX6SLL_CLK_SPDIF_SEL>,
+                       <&clks IMX6SLL_CLK_SPDIF_PODF>;
+       assigned-clock-parents = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <0>, <98304000>;
+       status = "okay";
+};
+
+&usdhc2 {
+       status = "disabled";
+};
+
+

diff --git a/arch/arm/boot/dts/imx6sll-lpddr3-arm2.dts b/arch/arm/boot/dts/imx6sll-lpddr3-arm2.dts
index 8e3fcc5..063ea3e 100644 (file)
--- a/arch/arm/boot/dts/imx6sll-lpddr3-arm2.dts
+++ b/arch/arm/boot/dts/imx6sll-lpddr3-arm2.dts
@@ -59,6 +59,24 @@
                        vin-supply = <&swbst_reg>;
                };
 
+               reg_aud3v: regulator@2 {
+                       compatible = "regulator-fixed";
+                       reg = <2>;
+                       regulator-name = "wm8962-supply-3v15";
+                       regulator-min-microvolt = <3150000>;
+                       regulator-max-microvolt = <3150000>;
+                       regulator-boot-on;
+               };
+
+               reg_aud4v: regulator@3 {
+                       compatible = "regulator-fixed";
+                       reg = <3>;
+                       regulator-name = "wm8962-supply-4v2";
+                       regulator-min-microvolt = <4325000>;
+                       regulator-max-microvolt = <4325000>;
+                       regulator-boot-on;
+               };
+
                reg_sd1_vmmc: sd1_vmmc {
                        compatible = "regulator-fixed";
                        regulator-name = "SD1_SPWR";
@@ -87,6 +105,35 @@
                };
 
        };
+
+       sound {
+               compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
+               model = "wm8962-audio";
+               cpu-dai = <&ssi2>;
+               audio-codec = <&codec>;
+               audio-routing =
+                       "Headphone Jack", "HPOUTL",
+                       "Headphone Jack", "HPOUTR",
+                       "Ext Spk", "SPKOUTL",
+                       "Ext Spk", "SPKOUTR",
+                       "AMIC", "MICBIAS",
+                       "IN3R", "AMIC";
+               mux-int-port = <2>;
+               mux-ext-port = <3>;
+               codec-master;
+               hp-det-gpios = <&gpio4 24 1>;
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux3>;
+       status = "okay";
+};
+
+&clks {
+       assigned-clocks = <&clks IMX6SLL_CLK_PLL4_AUDIO_DIV>;
+       assigned-clock-rates = <393216000>;
 };
 
 &cpu0 {
@@ -271,6 +318,28 @@
        };
 };
 
+&i2c3 {
+       clock-frequency = <100000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+
+       codec: wm8962@1a {
+               compatible = "wlf,wm8962";
+               reg = <0x1a>;
+               clocks = <&clks IMX6SLL_CLK_EXTERN_AUDIO>;
+               DCVDD-supply = <&vgen3_reg>;
+               DBVDD-supply = <&reg_aud3v>;
+               AVDD-supply = <&vgen3_reg>;
+               CPVDD-supply = <&vgen3_reg>;
+               MICVDD-supply = <&reg_aud3v>;
+               PLLVDD-supply = <&vgen3_reg>;
+               SPKVDD1-supply = <&reg_aud4v>;
+               SPKVDD2-supply = <&reg_aud4v>;
+               amic-mono;
+       };
+};
+
 &gpc {
        fsl,ldo-bypass = <1>;
 };
@@ -290,6 +359,17 @@
                                MX6SLL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 /* SD3 CD */
                                MX6SLL_PAD_KEY_COL6__GPIO4_IO04 0x17059 /*SD3 RESET */
                                MX6SLL_PAD_KEY_COL5__GPIO4_IO02 0x17059
+                               MX6SLL_PAD_GPIO4_IO24__GPIO4_IO24 0x17059 /* HP DETECT */
+                       >;
+               };
+
+               pinctrl_audmux3: audmux3grp {
+                       fsl,pins = <
+                               MX6SLL_PAD_AUD_TXC__AUD3_TXC            0x4130b0
+                               MX6SLL_PAD_AUD_TXFS__AUD3_TXFS          0x4130b0
+                               MX6SLL_PAD_AUD_TXD__AUD3_TXD            0x4110b0
+                               MX6SLL_PAD_AUD_RXD__AUD3_RXD            0x4130b0
+                               MX6SLL_PAD_AUD_MCLK__AUDIO_CLK_OUT      0x4130b0
                        >;
                };
 
@@ -339,6 +419,12 @@
                        >;
                };
 
+               pinctrl_spdif: spdifgrp {
+                       fsl,pins = <
+                               MX6SLL_PAD_SD2_DATA4__SPDIF_OUT 0x4130b0
+                       >;
+               };
+
                pinctrl_uart1: uart1grp {
                        fsl,pins = <
                                MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
@@ -440,6 +526,13 @@
                        >;
                };
 
+               pinctrl_i2c3: i2c3grp {
+                       fsl,pins = <
+                               MX6SLL_PAD_EPDC_SDCE2__I2C3_SCL  0x4001b8b1
+                               MX6SLL_PAD_EPDC_SDCE3__I2C3_SDA  0x4001b8b1
+                       >;
+               };
+
                pinctrl_ecspi1: ecspi1grp {
                        fsl,pins = <
                                MX6SLL_PAD_ECSPI1_MISO__ECSPI1_MISO      0x100b1
@@ -529,3 +622,7 @@
        DISPLAY-supply = <&DISPLAY_reg>;
        status = "okay";
 };
+
+&ssi2 {
+       status = "okay";
+};

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index d378e7f..ddef9be 100644 (file)
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -276,7 +276,7 @@
                                };
 
                                ssi1: ssi@02028000 {
-                                       compatible = "fsl,imx6sll-ssi", "fsl-imx51-ssi";
+                                       compatible = "fsl,imx6sll-ssi", "fsl,imx51-ssi";
                                        reg = <0x02028000 0x4000>;
                                        interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                                        dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
@@ -600,13 +600,12 @@
                                compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
                                reg = <0x020ec000 0x4000>;
                                interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                               clocks = <&clks IMX6SLL_CLK_DUMMY>,
-                                        <&clks IMX6SLL_CLK_DUMMY>;
+                               clocks = <&clks IMX6SLL_CLK_SDMA>,
+                                        <&clks IMX6SLL_CLK_SDMA>;
                                clock-names = "ipg", "ahb";
                                #dma-cells = <3>;
                                iram = <&ocram>;
-                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q-bin";
-                               status = "disabled";
+                               fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
                        };
 
                        pxp: pxp@020f0000 {