MLK-14326-11 mx6slevk: Enable OF_CONTROL and DM drivers

Update mx6slevk board files and build configurations to enable
OF_CONTROL and DM drivers.

1. Update PMIC and LDO-bypass codes for DM PMIC driver.
2. Update configurations for DM i2c driver
3. GPIO update for adding gpio_request
4. Remove duplicated configurations from build config

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 76fc24e..cceb1ca 100644 (file)
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -217,6 +217,7 @@ static void setup_iomux_fec(void)
        imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
 
        /* Power up LAN8720 PHY */
+       gpio_request(ETH_PHY_POWER, "LAN8720 PHY PWR");
        gpio_direction_output(ETH_PHY_POWER , 1);
        udelay(15000);
 }
@@ -273,18 +274,21 @@ int board_mmc_init(bd_t *bis)
                case 0:
                        imx_iomux_v3_setup_multiple_pads(
                                usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
+                       gpio_request(USDHC1_CD_GPIO, "usdhc1 cd");
                        gpio_direction_input(USDHC1_CD_GPIO);
                        usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
                        break;
                case 1:
                        imx_iomux_v3_setup_multiple_pads(
                                usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+                       gpio_request(USDHC2_CD_GPIO, "usdhc2 cd");
                        gpio_direction_input(USDHC2_CD_GPIO);
                        usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
                        break;
                case 2:
                        imx_iomux_v3_setup_multiple_pads(
                                usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
+                       gpio_request(USDHC3_CD_GPIO, "usdhc3 cd");
                        gpio_direction_input(USDHC3_CD_GPIO);
                        usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
                        break;
@@ -316,6 +320,7 @@ int board_mmc_init(bd_t *bis)
        case 0:
                imx_iomux_v3_setup_multiple_pads(usdhc1_pads,
                                                 ARRAY_SIZE(usdhc1_pads));
+               gpio_request(USDHC1_CD_GPIO, "usdhc1 cd");
                gpio_direction_input(USDHC1_CD_GPIO);
                usdhc_cfg[0].esdhc_base = USDHC1_BASE_ADDR;
                usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
@@ -323,6 +328,7 @@ int board_mmc_init(bd_t *bis)
        case 1:
                imx_iomux_v3_setup_multiple_pads(usdhc2_pads,
                                                 ARRAY_SIZE(usdhc2_pads));
+               gpio_request(USDHC2_CD_GPIO, "usdhc2 cd");
                gpio_direction_input(USDHC2_CD_GPIO);
                usdhc_cfg[0].esdhc_base = USDHC2_BASE_ADDR;
                usdhc_cfg[0].max_bus_width = 4;
@@ -331,6 +337,7 @@ int board_mmc_init(bd_t *bis)
        case 2:
                imx_iomux_v3_setup_multiple_pads(usdhc3_pads,
                                                 ARRAY_SIZE(usdhc3_pads));
+               gpio_request(USDHC3_CD_GPIO, "usdhc3 cd");
                gpio_direction_input(USDHC3_CD_GPIO);
                usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
                usdhc_cfg[0].max_bus_width = 4;
@@ -343,7 +350,6 @@ int board_mmc_init(bd_t *bis)
 #endif
 }
 
-#ifdef CONFIG_SYS_I2C_MXC
 #define PC     MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC */
 struct i2c_pads_info i2c_pad_info1 = {
@@ -359,6 +365,7 @@ struct i2c_pads_info i2c_pad_info1 = {
        },
 };
 
+#ifdef CONFIG_POWER
 int power_init_board(void)
 {
        struct pmic *pfuze;
@@ -399,8 +406,51 @@ int power_init_board(void)
 
        return 0;
 }
+#elif defined(CONFIG_DM_PMIC_PFUZE100)
+int power_init_board(void)
+{
+       struct udevice *dev;
+       unsigned int reg;
+       int ret;
+
+       dev = pfuze_common_init();
+       if (!dev)
+               return -ENODEV;
+
+       ret = pfuze_mode_init(dev, APS_PFM);
+       if (ret < 0)
+               return ret;
+
+       /* set SW1AB staby volatage 0.975V*/
+       reg = pmic_reg_read(dev, PFUZE100_SW1ABSTBY);
+       reg &= ~0x3f;
+       reg |= 0x1b;
+       pmic_reg_write(dev, PFUZE100_SW1ABSTBY, reg);
+
+       /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
+       reg = pmic_reg_read(dev, PFUZE100_SW1ABCONF);
+       reg &= ~0xc0;
+       reg |= 0x40;
+       pmic_reg_write(dev, PFUZE100_SW1ABCONF, reg);
+
+       /* set SW1C staby volatage 0.975V*/
+       reg = pmic_reg_read(dev, PFUZE100_SW1CSTBY);
+       reg &= ~0x3f;
+       reg |= 0x1b;
+       pmic_reg_write(dev, PFUZE100_SW1CSTBY, reg);
+
+       /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
+       reg = pmic_reg_read(dev, PFUZE100_SW1CCONF);
+       reg &= ~0xc0;
+       reg |= 0x40;
+       pmic_reg_write(dev, PFUZE100_SW1CCONF, reg);
+
+       return 0;
+}
+#endif
 
 #ifdef CONFIG_LDO_BYPASS_CHECK
+#ifdef CONFIG_POWER
 void ldo_mode_set(int ldo_bypass)
 {
        u32 value;
@@ -452,6 +502,45 @@ void ldo_mode_set(int ldo_bypass)
                printf("switch to ldo_bypass mode!\n");
        }
 }
+#elif defined(CONFIG_DM_PMIC_PFUZE100)
+void ldo_mode_set(int ldo_bypass)
+{
+       struct udevice *dev;
+       int ret;
+       int is_400M;
+       u32 vddarm;
+
+       ret = pmic_get("pfuze100", &dev);
+       if (ret == -ENODEV) {
+               printf("No PMIC found!\n");
+               return;
+       }
+
+       /* switch to ldo_bypass mode , boot on 800Mhz */
+       if (ldo_bypass) {
+               prep_anatop_bypass();
+
+               /* decrease VDDARM for 400Mhz DQ:1.1V, DL:1.275V */
+               pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, 0x20);
+               
+               /* increase VDDSOC to 1.3V */
+               pmic_clrsetbits(dev, PFUZE100_SW1CVOL, 0x3f, 0x28);
+
+               is_400M = set_anatop_bypass(0);
+               if (is_400M)
+                       vddarm = 0x1b;
+               else
+                       vddarm = 0x23;
+               
+               pmic_clrsetbits(dev, PFUZE100_SW1ABVOL, 0x3f, vddarm);
+
+               /* decrease VDDSOC to 1.175V */
+               pmic_clrsetbits(dev, PFUZE100_SW1CVOL, 0x3f, 0x23);
+
+               finish_anatop_bypass();
+               printf("switch to ldo_bypass mode!\n");
+       }
+}
 #endif
 
 #endif

diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index bbc615c..2954125 100644 (file)
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
 CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -18,16 +17,31 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
-CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y

diff --git a/configs/mx6slevk_epdc_defconfig b/configs/mx6slevk_epdc_defconfig
index b086312..5a8a3e0 100644 (file)
--- a/configs/mx6slevk_epdc_defconfig
+++ b/configs/mx6slevk_epdc_defconfig
@@ -3,7 +3,6 @@ CONFIG_ARCH_MX6=y
 CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL,SPLASH_SCREEN"
 CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -18,16 +17,31 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
-CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y

diff --git a/configs/mx6slevk_plugin_defconfig b/configs/mx6slevk_plugin_defconfig
index 761e78b..e60f27f 100644 (file)
--- a/configs/mx6slevk_plugin_defconfig
+++ b/configs/mx6slevk_plugin_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_MX6SLEVK=y
 CONFIG_USE_IMXIMG_PLUGIN=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
 CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -19,16 +18,31 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
-CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y

diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index 7349c6d..1288aff 100644 (file)
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -4,7 +4,6 @@ CONFIG_TARGET_MX6SLEVK=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL"
 CONFIG_SPI_BOOT=y
 CONFIG_BOOTDELAY=3
-CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMLS is not set
@@ -19,16 +18,31 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
-CONFIG_DM=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_DM_THERMAL=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
+# CONFIG_OF_LIBFDT=y
+
+CONFIG_DEFAULT_DEVICE_TREE="imx6sl-evk"
+CONFIG_OF_CONTROL=y
+# CONFIG_BLK is not set
+CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_DM_MMC=y
+# CONFIG_DM_MMC_OPS is not set
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX6=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_PFUZE100=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_PFUZE100=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_ETH=y
+CONFIG_DM_USB=y

diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 0f04043..c33fcf6 100644 (file)
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -29,18 +29,24 @@
 #define CONFIG_SYS_MMC_ENV_DEV         1       /* SDHC2*/
 
 /* I2C Configs */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
+#endif
+#ifdef CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C_MXC
 #define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
 #define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED             100000
+#endif
 
 /* PMIC */
+#ifndef CONFIG_DM_PMIC
 #define CONFIG_POWER
 #define CONFIG_POWER_I2C
 #define CONFIG_POWER_PFUZE100
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
+#endif
 
 #define CONFIG_FEC_MXC
 #define CONFIG_MII