arm64: dts: imx8mq: add adv7535 related DTS files

This patch adds:
 * an ADV7535 entry in imx8mq-evk.dts;
 * DTS for DCSS + MIPI_DSI + ADV7535;
 * DTS for LCDIF + MIPI_DSI + ADV7535;

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Reviewed-by: Robert Chiras <robert.chiras@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index be3097e..66007be 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -40,9 +40,9 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb imx8mq-evk-pcie1-m2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-ak4497.dtb imx8mq-evk-audio-tdm.dtb imx8mq-evk-pdm.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-root.dtb imx8mq-evk-inmate.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-lcdif-rm67191.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-lcdif-rm67191.dtb imx8mq-evk-lcdif-adv7535.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-dcss-rm67191.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk-dcss-rm67191.dtb imx8mq-evk-dcss-adv7535.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r2.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-r3.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-adv7535.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-adv7535.dts
new file mode 100644 (file)
index 0000000..d98d6dc
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-dcss-adv7535.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include "imx8mq-evk.dts"
+
+/ {
+       sound-hdmi {
+               status = "disabled";
+       };
+};
+
+&irqsteer {
+       status = "okay";
+};
+
+/delete-node/ &hdmi;
+
+&lcdif {
+       status = "disabled";
+};
+
+&dcss {
+       status = "okay";
+
+       clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
+                <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
+                <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
+                <&clk IMX8MQ_CLK_DC_PIXEL>,
+                <&clk IMX8MQ_CLK_DISP_DTRC>;
+       clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
+       assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
+                                         <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
+                                         <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                                         <&clk IMX8MQ_CLK_DISP_AXI>,
+                                         <&clk IMX8MQ_CLK_DISP_RTRM>;
+       assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+                                                        <&clk IMX8MQ_VIDEO_PLL1>,
+                                                        <&clk IMX8MQ_CLK_27M>,
+                                                        <&clk IMX8MQ_SYS1_PLL_800M>,
+                                                        <&clk IMX8MQ_SYS1_PLL_800M>;
+       assigned-clock-rates = <600000000>, <0>, <0>,
+                                                  <800000000>,
+                                                  <400000000>;
+
+       port@0 {
+               dcss_out: endpoint {
+                       remote-endpoint = <&mipi_dsi_in>;
+               };
+       };
+};
+
+&adv_bridge {
+       status = "okay";
+
+       port@0 {
+               adv7535_in: endpoint {
+                       remote-endpoint = <&mipi_dsi_out>;
+               };
+       };
+};
+
+&mipi_dsi {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       mipi_dsi_in: endpoint {
+                               remote-endpoint = <&dcss_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       mipi_dsi_out: endpoint {
+                               remote-endpoint = <&adv7535_in>;
+                       };
+               };
+       };
+};
+
+&dphy {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_mipi_dsi_en: mipi_dsi_en {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6      0x16
+               >;
+       };
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-lcdif-adv7535.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-lcdif-adv7535.dts
new file mode 100644 (file)
index 0000000..1240c53
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-lcdif-adv7535.dts
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2019 NXP.
+ */
+
+#include "imx8mq-evk.dts"
+
+/ {
+       sound-hdmi {
+               status = "disabled";
+       };
+};
+
+&irqsteer {
+       status = "okay";
+};
+
+&hdmi {
+       status = "disabled";
+};
+
+&dcss {
+       status = "disabled";
+};
+
+&lcdif {
+       status = "okay";
+       max-memory-bandwidth = <497829888>; /* 1920x1080-32@60.02 */
+
+       assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL>,
+                         <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,
+                         <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                         <&clk IMX8MQ_VIDEO_PLL1>;
+       assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+                                <&clk IMX8MQ_VIDEO_PLL1>,
+                                <&clk IMX8MQ_CLK_27M>;
+       assigned-clock-rate = <126000000>, <0>, <0>, <1134000000>;
+
+       port@0 {
+               lcdif_out: endpoint {
+                       remote-endpoint = <&mipi_dsi_in>;
+               };
+       };
+};
+
+&adv_bridge {
+       status = "okay";
+
+       port@0 {
+               adv7535_in: endpoint {
+                       remote-endpoint = <&mipi_dsi_out>;
+               };
+       };
+};
+
+&mipi_dsi {
+       status = "okay";
+
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       mipi_dsi_in: endpoint {
+                               remote-endpoint = <&lcdif_out>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       mipi_dsi_out: endpoint {
+                               remote-endpoint = <&adv7535_in>;
+                       };
+               };
+       };
+};
+
+&dphy {
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_mipi_dsi_en: mipi_dsi_en {
+               fsl,pins = <
+                       MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6      0x16
+               >;
+       };
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 5a44857..e4f1b6e 100755 (executable)
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -525,6 +525,18 @@
                ak4497,pdn-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
                dsd-path = <1>;
        };
+
+       adv_bridge: adv7535@3d {
+               compatible = "adi,adv7535";
+               reg = <0x3d>;
+               adi,addr-cec = <0x3b>;
+               adi,dsi-lanes = <4>;
+               pinctrl-0 = <&pinctrl_i2c1_dsi_ts_int>;
+               interrupt-parent = <&gpio5>;
+               interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+               status = "disabled";
+       };
 };
 
 &lcdif {