mmc: mmci: add optional reset property

This patch adds a optional reset management.
STM32 sdmmc variant needs to reset hardware block
during the power cycle procedure (for re-initialization).

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 7607599..d636a0e 100644 (file)
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -36,6 +36,7 @@
 #include <linux/pm_runtime.h>
 #include <linux/types.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/reset.h>
 
 #include <asm/div64.h>
 #include <asm/io.h>
@@ -1882,6 +1883,12 @@ static int mmci_probe(struct amba_device *dev,
 
        dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max);
 
+       host->rst = devm_reset_control_get_optional_exclusive(&dev->dev, NULL);
+       if (IS_ERR(host->rst)) {
+               ret = PTR_ERR(host->rst);
+               goto clk_disable;
+       }
+
        /* Get regulators and the supported OCR mask */
        ret = mmc_regulator_get_supply(mmc);
        if (ret)

diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index cdcadd2..8ecb1ee 100644 (file)
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -318,6 +318,8 @@ struct mmci_host {
        struct clk              *clk;
        u8                      singleirq:1;
 
+       struct reset_control    *rst;
+
        spinlock_t              lock;
 
        unsigned int            mclk;