MLK-22448-1 clk: imx8m: Correct qspi parent
authorLeonard Crestez <leonard.crestez@nxp.com>
Fri, 16 Aug 2019 16:53:46 +0000 (19:53 +0300)
committerLeonard Crestez <leonard.crestez@nxp.com>
Fri, 16 Aug 2019 18:41:34 +0000 (21:41 +0300)
On imx8mm and imx8mn sys_pll1_800m is not a parent of qspi, that mux
position connects to sys_pll2_333m instead.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
drivers/clk/imx/clk-imx8mm.c
drivers/clk/imx/clk-imx8mn.c

index ee4b5ad..212d686 100644 (file)
@@ -264,7 +264,7 @@ static const char *imx8mm_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll
 static const char *imx8mm_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out", "sys_pll1_400m",
                                         "audio_pll2_out", "sys_pll3_out", "sys_pll2_250m", "video_pll1_out", };
 
-static const char *imx8mm_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
+static const char *imx8mm_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
                                         "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
 
 static const char *imx8mm_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
index 967a147..48462de 100644 (file)
@@ -219,7 +219,7 @@ static const char *imx8mn_enet_phy_sels[] = {"osc_24m", "sys_pll2_50m", "sys_pll
 static const char *imx8mn_nand_sels[] = {"osc_24m", "sys_pll2_500m", "audio_pll1_out", "sys_pll1_400m",
                                         "audio_pll2_out", "sys_pll3_out", "sys_pll2_250m", "video_pll1_out", };
 
-static const char *imx8mn_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
+static const char *imx8mn_qspi_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll2_333m", "sys_pll2_500m",
                                         "audio_pll2_out", "sys_pll1_266m", "sys_pll3_out", "sys_pll1_100m", };
 
 static const char *imx8mn_usdhc1_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",