pmic: pca9450@25 {
reg = <0x25>;
compatible = "nxp,pca9450a";
- /* PMIC PCA9450 PMIC_nINT GPIO1_IO3 */
+ /* PMIC PCA9450 PMIC_nINT GPIO5_I20 */
pinctrl-0 = <&pinctrl_pmic>;
- gpio_intr = <&gpio1 3 GPIO_ACTIVE_LOW>;
+ gpio_intr = <&gpio5 20 GPIO_ACTIVE_LOW>;
regulators {
#address-cells = <1>;
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
+ MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x141
>;
};
reg = <0x25>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
- interrupt-parent = <&gpio1>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
regulators {
buck1: BUCK1{
status = "okay";
};
-&usbotg2 {
- status = "okay";
-};
-
&usdhc2 {
assigned-clocks = <&clk IMX8MN_CLK_USDHC2>;
assigned-clock-rates = <200000000>;
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
- MX8MN_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
+ MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x141
>;
};