MLK-16094-3 imx8qxp_arm2/mek: Update codes to use pinctrl driver

This patch enables the pinctrl driver for i.MX8QXP ARM2 and MEK boards.
For DM enabled driver, the iomux pins can be set by pinctrl driver. So
the board codes don't need to set iomux explicitly for these DM enabled modules.

Also update the DTS file for i2c pins settings.

Signed-off-by: Ye Li <ye.li@nxp.com>

diff --git a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
index 8637bf1..2683513 100644 (file)
--- a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
+++ b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
@@ -179,6 +179,20 @@
                                SC_P_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B     0x0600004c
                        >;
                };
+
+               pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
+                       fsl,pins = <
+                               SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
+                               SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
+                       >;
+               };
+
+               pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
+                       fsl,pins = <
+                               SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020
+                               SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020
+                       >;
+               };
        };
 };
 
@@ -285,6 +299,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
        clock-frequency = <100000>;
        status = "okay";
 
@@ -298,6 +313,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
        clock-frequency = <100000>;
        status = "okay";
 

diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-mek.dts
index cac6c66..8b051ab 100644 (file)
--- a/arch/arm/dts/fsl-imx8qxp-mek.dts
+++ b/arch/arm/dts/fsl-imx8qxp-mek.dts
@@ -212,6 +212,20 @@
                                SC_P_QSPI0B_SS1_B_LSIO_QSPI0B_SS1_B     0x0600004c
                        >;
                };
+
+               pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp {
+                       fsl,pins = <
+                               SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020
+                               SC_P_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020
+                       >;
+               };
+
+               pinctrl_i2c0_mipi_lvds1: mipi_lvds1_i2c0_grp {
+                       fsl,pins = <
+                               SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020
+                               SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020
+                       >;
+               };
        };
 };
 
@@ -345,6 +359,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>;
        clock-frequency = <100000>;
        status = "okay";
 };
@@ -353,6 +368,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c0_mipi_lvds1>;
        clock-frequency = <100000>;
        status = "okay";
 };

diff --git a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
index ffaf202..b5ccc7c 100644 (file)
--- a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
+++ b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
@@ -93,36 +93,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-#ifdef CONFIG_SYS_I2C_IMX_LPI2C
-static iomux_cfg_t lpi2c3_pads[] = {
-       SC_P_SPI3_CS1 | MUX_MODE_ALT(1) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_MCLK_IN1 | MUX_MODE_ALT(1) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-static iomux_cfg_t lpi2c1_pads[] = {
-       SC_P_USB_SS3_TC1 | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_USB_SS3_TC3 | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-static iomux_cfg_t mipi0_lpi2c0_pads[] = {
-       SC_P_MIPI_DSI0_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_MIPI_DSI0_I2C0_SDA | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-static iomux_cfg_t mipi1_lpi2c0_pads[] = {
-       SC_P_MIPI_DSI1_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_MIPI_DSI1_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-void i2c_init_board(void)
-{
-       imx8_iomux_setup_multiple_pads(lpi2c1_pads, ARRAY_SIZE(lpi2c1_pads));
-       imx8_iomux_setup_multiple_pads(lpi2c3_pads, ARRAY_SIZE(lpi2c3_pads));
-       imx8_iomux_setup_multiple_pads(mipi0_lpi2c0_pads, ARRAY_SIZE(mipi0_lpi2c0_pads));
-       imx8_iomux_setup_multiple_pads(mipi1_lpi2c0_pads, ARRAY_SIZE(mipi1_lpi2c0_pads));
-}
-#endif
-
 #ifdef CONFIG_FSL_ESDHC
 
 #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 22)
@@ -160,15 +130,6 @@ static iomux_cfg_t usdhc1_sd[] = {
        SC_P_USDHC1_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL),
 };
 
-
-#ifdef CONFIG_DM_MMC
-void setup_mmc(void)
-{
-       imx8_iomux_setup_multiple_pads(emmc0, ARRAY_SIZE(emmc0));
-       imx8_iomux_setup_multiple_pads(usdhc1_sd, ARRAY_SIZE(usdhc1_sd));
-}
-#endif
-
 int board_mmc_init(bd_t *bis)
 {
        int i, ret;
@@ -411,20 +372,6 @@ static int setup_fec(int ind)
 #endif
 
 #ifdef CONFIG_FSL_FSPI
-static iomux_cfg_t pad_fspi[] = {
-       SC_P_QSPI0A_DATA0 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA1 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA2 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA3 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DQS   | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_SS0_B | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_SCLK  | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA0 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA1 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA2 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA3 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-};
-
 void board_fspi_init(void)
 {
        sc_err_t sciErr = 0;
@@ -453,8 +400,6 @@ void board_fspi_init(void)
                return;
        }
 
-       imx8_iomux_setup_multiple_pads(pad_fspi, ARRAY_SIZE(pad_fspi));
-
 }
 #endif
 
@@ -573,15 +518,8 @@ void pci_init_board(void)
 #endif
 
 #ifdef CONFIG_USB_EHCI_MX6
-static iomux_cfg_t otg1_pins[] = {
-       /* Set USB PWR to GPIO used by DM driver */
-       SC_P_USB_SS3_TC0 | MUX_MODE_ALT(3) | MUX_PAD_CTRL(GPIO_PAD_CTRL),
-};
-
 static void setup_otg(void)
 {
-       imx8_iomux_setup_multiple_pads(otg1_pins, ARRAY_SIZE(otg1_pins));
-
        /* Enable usb power */
        init_otg_power();
 }
@@ -593,23 +531,14 @@ int board_init(void)
        board_gpio_init();
 #endif
 
-#ifdef CONFIG_SYS_I2C_IMX_LPI2C
-       i2c_init_board();
-#endif
-
 #ifdef CONFIG_FEC_MXC
        setup_fec(CONFIG_FEC_ENET_DEV);
-       setup_iomux_fec();
 #endif
 
 #ifdef CONFIG_FSL_FSPI
        board_fspi_init();
 #endif
 
-#ifdef CONFIG_DM_MMC
-       setup_mmc();
-#endif
-
 #ifdef CONFIG_USB_EHCI_MX6
        setup_otg();
 #endif

diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 6d7006f..421595c 100644 (file)
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -93,30 +93,6 @@ int board_early_init_f(void)
        return 0;
 }
 
-#ifdef CONFIG_SYS_I2C_IMX_LPI2C
-static iomux_cfg_t lpi2c1_pads[] = {
-       SC_P_USB_SS3_TC1 | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_USB_SS3_TC3 | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-static iomux_cfg_t mipi0_lpi2c0_pads[] = {
-       SC_P_MIPI_DSI0_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_MIPI_DSI0_I2C0_SDA | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-static iomux_cfg_t mipi1_lpi2c0_pads[] = {
-       SC_P_MIPI_DSI1_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-       SC_P_MIPI_DSI1_I2C0_SCL | MUX_MODE_ALT(0) | MUX_PAD_CTRL(I2C_PAD_CTRL),
-};
-
-void i2c_init_board(void)
-{
-       imx8_iomux_setup_multiple_pads(lpi2c1_pads, ARRAY_SIZE(lpi2c1_pads));
-       imx8_iomux_setup_multiple_pads(mipi0_lpi2c0_pads, ARRAY_SIZE(mipi0_lpi2c0_pads));
-       imx8_iomux_setup_multiple_pads(mipi1_lpi2c0_pads, ARRAY_SIZE(mipi1_lpi2c0_pads));
-}
-#endif
-
 #ifdef CONFIG_FSL_ESDHC
 
 #define USDHC1_CD_GPIO IMX_GPIO_NR(4, 22)
@@ -153,15 +129,6 @@ static iomux_cfg_t usdhc1_sd[] = {
        SC_P_USDHC1_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL),
 };
 
-
-#ifdef CONFIG_DM_MMC
-void setup_mmc(void)
-{
-       imx8_iomux_setup_multiple_pads(emmc0, ARRAY_SIZE(emmc0));
-       imx8_iomux_setup_multiple_pads(usdhc1_sd, ARRAY_SIZE(usdhc1_sd));
-}
-#endif
-
 int board_mmc_init(bd_t *bis)
 {
        int i, ret;
@@ -398,20 +365,6 @@ static int setup_fec(int ind)
 #endif
 
 #ifdef CONFIG_FSL_FSPI
-static iomux_cfg_t pad_fspi[] = {
-       SC_P_QSPI0A_DATA0 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA1 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA2 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DATA3 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_DQS   | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_SS0_B | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0A_SCLK  | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA0 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA1 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA2 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-       SC_P_QSPI0B_DATA3 | MUX_PAD_CTRL(FSPI_PAD_CTRL),
-};
-
 void board_fspi_init(void)
 {
        sc_err_t sciErr = 0;
@@ -439,9 +392,6 @@ void board_fspi_init(void)
                puts("FSPI0 enable clock failed\n");
                return;
        }
-
-       imx8_iomux_setup_multiple_pads(pad_fspi, ARRAY_SIZE(pad_fspi));
-
 }
 #endif
 
@@ -563,23 +513,14 @@ int board_init(void)
        board_gpio_init();
 #endif
 
-#ifdef CONFIG_SYS_I2C_IMX_LPI2C
-       i2c_init_board();
-#endif
-
 #ifdef CONFIG_FEC_MXC
        setup_fec(CONFIG_FEC_ENET_DEV);
-       setup_iomux_fec();
 #endif
 
 #ifdef CONFIG_FSL_FSPI
        board_fspi_init();
 #endif
 
-#ifdef CONFIG_DM_MMC
-       setup_mmc();
-#endif
-
 #ifdef CONFIG_USB_EHCI_MX6
        setup_otg();
 #endif

diff --git a/configs/imx8qxp_lpddr4_arm2_defconfig b/configs/imx8qxp_lpddr4_arm2_defconfig
index 844bc7a..d583527 100644 (file)
--- a/configs/imx8qxp_lpddr4_arm2_defconfig
+++ b/configs/imx8qxp_lpddr4_arm2_defconfig
@@ -57,3 +57,6 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 
 CONFIG_VIDEO=y
+
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8=y

diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 5e46099..ba49d0a 100644 (file)
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -57,3 +57,6 @@ CONFIG_DM_ETH=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8=y

diff --git a/configs/mx8qxp_lpddr4_arm2_android_defconfig b/configs/mx8qxp_lpddr4_arm2_android_defconfig
index 1003a20..ed2fc2a 100644 (file)
--- a/configs/mx8qxp_lpddr4_arm2_android_defconfig
+++ b/configs/mx8qxp_lpddr4_arm2_android_defconfig
@@ -57,3 +57,6 @@ CONFIG_DM_ETH=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8=y

diff --git a/configs/mx8qxp_mek_android_defconfig b/configs/mx8qxp_mek_android_defconfig
index 43c4aa6..5432946 100644 (file)
--- a/configs/mx8qxp_mek_android_defconfig
+++ b/configs/mx8qxp_mek_android_defconfig
@@ -59,3 +59,6 @@ CONFIG_DM_ETH=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
+
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8=y