d->cmd.pio_words[4] = (dma_addr_t)nand_info->data_buf;
d->cmd.pio_words[5] = (dma_addr_t)nand_info->oob_buf;
-#if CONFIG_IS_ENABLED(MX7)
- if (nand_info->en_randomizer) {
+ if (is_mx7() && nand_info->en_randomizer) {
d->cmd.pio_words[2] |= GPMI_ECCCTRL_RANDOMIZER_ENABLE |
GPMI_ECCCTRL_RANDOMIZER_TYPE2;
/*
*/
d->cmd.pio_words[3] |= (page % 255) << 16;
}
-#endif
mxs_dma_desc_append(channel, d);
struct mxs_dma_desc **desc;
uint32_t desc_index;
-#if CONFIG_IS_ENABLED(MX7) || CONFIG_IS_ENABLED(MX6)
u32 en_randomizer;
u32 writesize;
u32 oobsize;
u32 bch_flash0layout0;
u32 bch_flash0layout1;
-#endif /* CONFIG_IS_ENABLED(MX7) */
};
struct mxs_nand_layout {
int mxs_nand_init_spl(struct nand_chip *nand);
int mxs_nand_setup_ecc(struct mtd_info *mtd);
-#if CONFIG_IS_ENABLED(MX7) || CONFIG_IS_ENABLED(MX6)
void mxs_nand_mode_fcb(struct mtd_info *mtd);
void mxs_nand_mode_normal(struct mtd_info *mtd);
u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);
-#endif /* CONFIG_IS_ENABLED(MX7) */