ASoC: Intel: Skylake: Reset stream to link mapping
authorRakesh Ughreja <rakesh.a.ughreja@intel.com>
Sun, 1 Apr 2018 09:43:23 +0000 (15:13 +0530)
committerMark Brown <broonie@kernel.org>
Tue, 17 Apr 2018 10:35:30 +0000 (11:35 +0100)
By default all the streams are mapped to all links after controller is
reset which causes stream to be broadcast on all the links.

This patch resets the stream-link mapping after controller reset. The
stream is mapped later to the appropriate link as part of stream setup.

Tested-by: Abhijeet Kumar <abhijeet.kumar@intel.com>
Signed-off-by: Rakesh Ughreja <rakesh.a.ughreja@intel.com>
Signed-off-by: Sanyog Kale <sanyog.r.kale@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/intel/skylake/skl.c

index abf3247..f0d9793 100644 (file)
@@ -127,10 +127,17 @@ static void skl_clock_power_gating(struct device *dev, bool enable)
  */
 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
 {
+       struct hdac_ext_bus *ebus = hbus_to_ebus(bus);
+       struct hdac_ext_link *hlink;
        int ret;
 
        skl_enable_miscbdcge(bus->dev, false);
        ret = snd_hdac_bus_init_chip(bus, full_reset);
+
+       /* Reset stream-to-link mapping */
+       list_for_each_entry(hlink, &ebus->hlink_list, list)
+               bus->io_ops->reg_writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
+
        skl_enable_miscbdcge(bus->dev, true);
 
        return ret;