MLK-17089-5: ASoC: wm8962: restore the CLOCKING2 register
authorShengjiu Wang <shengjiu.wang@nxp.com>
Wed, 15 Nov 2017 09:54:36 +0000 (17:54 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Tue, 20 Mar 2018 19:50:17 +0000 (14:50 -0500)
The CLOCKING2 is a volatile register, but some bits should
be restored when resume, for example SYSCLK_SRC. otherwise
the output clock is wrong

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
sound/soc/codecs/wm8962.c

index 0c426e5..e96eddf 100644 (file)
@@ -87,6 +87,7 @@ struct wm8962_priv {
 #endif
 
        int irq;
+       u32 cache_clocking2_reg;
 };
 
 /* We can't use the same notifier block for more than one supply and
@@ -3830,6 +3831,10 @@ static int wm8962_runtime_resume(struct device *dev)
 
        regcache_sync(wm8962->regmap);
 
+       regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
+                               WM8962_SYSCLK_SRC_MASK,
+                               wm8962->cache_clocking2_reg);
+
        regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
                           WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA,
                           WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA);
@@ -3859,6 +3864,9 @@ static int wm8962_runtime_suspend(struct device *dev)
                           WM8962_STARTUP_BIAS_ENA |
                           WM8962_VMID_BUF_ENA, 0);
 
+       regmap_read(wm8962->regmap, WM8962_CLOCKING2,
+                               &wm8962->cache_clocking2_reg);
+
        regcache_cache_only(wm8962->regmap, true);
 
        regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies),