mmc: renesas_sdhi: keep SCC clock active when tuning

Tuning procedure switches to lower frequencies but that will turn the
SCC off and accessing its register then will hang. So, check when we are
tuning and keep the current setup of the external clock if we are doing
so. Note that we still switch to the lower frequency because of the
internal divider. We just make sure to not modify the external clock.
This patch depends on a MMC core patch calling the downgrade function
earlier.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20200901150250.26236-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c
index 1243c42..42eaec4 100644 (file)
--- a/drivers/mmc/host/renesas_sdhi_core.c
+++ b/drivers/mmc/host/renesas_sdhi_core.c
@@ -117,8 +117,12 @@ static unsigned int renesas_sdhi_clk_update(struct tmio_mmc_host *host,
        unsigned int freq, diff, best_freq = 0, diff_min = ~0;
        int i;
 
-       /* tested only on R-Car Gen2+ currently; may work for others */
-       if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
+       /*
+        * We simply return the current rate if a) we are not on a R-Car Gen2+
+        * SoC (may work for others, but untested) or b) if the SCC needs its
+        * clock during tuning, so we don't change the external clock setup.
+        */
+       if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2) || mmc_doing_tune(host->mmc))
                return clk_get_rate(priv->clk);
 
        /*