MLK-11492 ARM: imx: keep weak 2p5 on for USB vbus wakeup

Since i.MX6SX, if USB vbus wake up is enabled, weak 2P5
needs to be on even if the DRAM is LPDDR2, previously, we need
to set stop_mode_config to keep 2P5 on, so enter DSM,
if USB vbus wakeup is enabled, we need to keep weak 2P5 on.

Signed-off-by: Anson Huang <b20788@freescale.com>
(cherry picked from commit 1ca4dffee79055ea95c59e27bab50bc5080310f5)
Signed-off-by: Peter Chen <peter.chen@freescale.com>

diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 3a88c73..8d0fd79 100644 (file)
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright (C) 2013-2016 Freescale Semiconductor, Inc.
  *
  * The code contained herein is licensed under the GNU General Public
  * License. You may obtain a copy of the GNU General Public License
@@ -108,7 +108,8 @@ void imx_anatop_pre_suspend(void)
                return;
        }
 
-       if (imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2)
+       if ((imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) &&
+               !imx_gpc_usb_wakeup_enabled())
                imx_anatop_enable_2p5_pulldown(true);
        else
                imx_anatop_enable_weak2p5(true);
@@ -132,7 +133,8 @@ void imx_anatop_post_resume(void)
                return;
        }
 
-       if (imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2)
+       if ((imx_mmdc_get_ddr_type() == IMX_DDR_TYPE_LPDDR2) &&
+               !imx_gpc_usb_wakeup_enabled())
                imx_anatop_enable_2p5_pulldown(false);
        else
                imx_anatop_enable_weak2p5(false);

diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index ddaba1e..81eb2f4 100644 (file)
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2004-2015 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2004-2016 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -160,6 +160,7 @@ void imx7d_low_power_idle(void);
 void imx6sx_low_power_idle(void);
 void imx6ul_low_power_idle(void);
 void imx6sl_low_power_idle(void);
+bool imx_gpc_usb_wakeup_enabled(void);
 
 #ifdef CONFIG_SUSPEND
 void v7_cpu_resume(void);

diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c
index 26392c2..336d7ab 100644 (file)
--- a/arch/arm/mach-imx/gpc.c
+++ b/arch/arm/mach-imx/gpc.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2011-2015 Freescale Semiconductor, Inc.
+ * Copyright 2011-2016 Freescale Semiconductor, Inc.
  * Copyright 2011 Linaro Ltd.
  *
  * The code contained herein is licensed under the GNU General Public
@@ -67,6 +67,9 @@
 #define DEFAULT_IPG_RATE               66000000
 #define GPC_PU_UP_DELAY_MARGIN         2
 
+/* for irq #74 and #75 */
+#define GPC_USB_VBUS_WAKEUP_IRQ_MASK           0xc00
+
 struct pu_domain {
        struct generic_pm_domain base;
        struct regulator *reg;
@@ -153,6 +156,24 @@ unsigned int imx_gpc_is_m4_sleeping(void)
        return 0;
 }
 
+bool imx_gpc_usb_wakeup_enabled(void)
+{
+       if (!(cpu_is_imx6sx() || cpu_is_imx6ul()))
+               return false;
+
+       /*
+        * for SoC later than i.MX6SX, USB vbus wakeup
+        * only needs weak 2P5 on, stop_mode_config is
+        * NOT needed, so we check if is USB vbus wakeup
+        * is enabled(assume irq #74 and #75) to decide
+        * if to keep weak 2P5 on.
+        */
+       if (gpc_wake_irqs[1] & GPC_USB_VBUS_WAKEUP_IRQ_MASK)
+               return true;
+
+       return false;
+}
+
 unsigned int imx_gpc_is_mf_mix_off(void)
 {
        return readl_relaxed(gpc_base + GPC_PGC_MF_PDN);