gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
+
+ reg_audio: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "cs42888_supply";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ reg_baseboard: fixedregulator@1 {
+ compatible = "regulator-fixed";
+ reg = <2>;
+ regulator-name = "baseboard_supply";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
};
+
+ sound-cs42888 {
+ compatible = "fsl,imx8qm-sabreauto-cs42888",
+ "fsl,imx-audio-cs42888";
+ model = "imx-cs42888";
+ esai-controller = <&esai0>;
+ audio-codec = <&codec>;
+ asrc-controller = <&asrc0>;
+ status = "okay";
+ };
+
+};
+
+&acm {
+ status = "okay";
+};
+
+&asrc0 {
+ fsl,asrc-rate = <48000>;
+ status = "okay";
+};
+
+&esai0 {
+ compatible = "fsl,imx8qxp-v1-esai";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_esai0>;
+ assigned-clocks = <&clk IMX8QXP_ACM_ESAI0_MCLK_SEL>,
+ <&clk IMX8QXP_AUD_PLL0_DIV>,
+ <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_DIV>,
+ <&clk IMX8QXP_AUD_ACM_AUD_REC_CLK0_DIV>,
+ <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>;
+ assigned-clock-parents = <&clk IMX8QXP_AUD_ACM_AUD_PLL_CLK0_CLK>;
+ assigned-clock-rates = <0>, <786432000>, <24576000>, <24576000>, <24576000>;
+ dmas = <&edma2 23 0 1 1>, <&edma2 21 0 0 1>;
+ status = "okay";
};
&iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
imx8qxp-lpddr4-arm2 {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ SC_P_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0xc600004c
+ >;
+ };
+
+ pinctrl_csi0_lpi2c0: csi0lpi2c0grp {
+ fsl,pins = <
+ SC_P_MIPI_CSI0_I2C0_SCL_MIPI_CSI0_I2C0_SCL 0xc2000020
+ SC_P_MIPI_CSI0_I2C0_SDA_MIPI_CSI0_I2C0_SDA 0xc2000020
+ >;
+ };
+
+ pinctrl_esai0: esai0grp {
+ fsl,pins = <
+ SC_P_ESAI0_FSR_ADMA_ESAI0_FSR 0xc600004c
+ SC_P_ESAI0_FST_ADMA_ESAI0_FST 0xc600004c
+ SC_P_ESAI0_SCKR_ADMA_ESAI0_SCKR 0xc600004c
+ SC_P_ESAI0_SCKT_ADMA_ESAI0_SCKT 0xc600004c
+ SC_P_ESAI0_TX0_ADMA_ESAI0_TX0 0xc600004c
+ SC_P_ESAI0_TX1_ADMA_ESAI0_TX1 0xc600004c
+ SC_P_ESAI0_TX2_RX3_ADMA_ESAI0_TX2_RX3 0xc600004c
+ SC_P_ESAI0_TX3_RX2_ADMA_ESAI0_TX3_RX2 0xc600004c
+ SC_P_ESAI0_TX4_RX1_ADMA_ESAI0_TX4_RX1 0xc600004c
+ SC_P_ESAI0_TX5_RX0_ADMA_ESAI0_TX5_RX0 0xc600004c
+ SC_P_MCLK_OUT0_ADMA_ACM_MCLK_OUT0 0xc600004c
+ >;
+ };
pinctrl_fec1: fec1grp {
fsl,pins = <
>;
};
+ pinctrl_lpuart3: lpuart3grp {
+ fsl,pins = <
+ SC_P_FLEXCAN2_RX_ADMA_UART3_RX 0x0600004c
+ SC_P_FLEXCAN2_TX_ADMA_UART3_TX 0x0600004c
+ >;
+ };
+
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
SC_P_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041
status = "disabled";
};
+&i2c0_csi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_csi0_lpi2c0>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ codec: cs42888@48 {
+ compatible = "cirrus,cs42888";
+ reg = <0x48>;
+ clocks = <&clk IMX8QXP_AUD_MCLKOUT0>;
+ clock-names = "mclk";
+ VA-supply = <®_audio>;
+ VD-supply = <®_audio>;
+ VLS-supply = <®_audio>;
+ VLC-supply = <®_audio>;
+ reset-gpio = <&pca9557_a 2 1>;
+ status = "okay";
+ };
+};
+
&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c1>;
};
&i2c3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpi2c3>;
status = "okay";
+
+ pca9557_a: gpio@18 {
+ compatible = "nxp,pca9557";
+ reg = <0x18>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&lpuart0 {
status = "okay";
};
+&lpuart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_lpuart3>;
+ status = "disabled";
+};
+
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
ethernet0 = &fec1;
ethernet1 = &fec2;
serial0 = &lpuart0;
+ serial3 = &lpuart3;
mmc0 = &usdhc1;
mmc1 = &usdhc2;
mmc2 = &usdhc3;
pd_mipi_dsi_i2c0: PD_MIPI_0_DSI_I2C0 {
name = "mipi0_dsi_i2c0";
reg = <SC_R_MIPI_0_I2C_0>;
+ #power-domain-cells = <0>;
power-domains =<&pd_mipi_dsi>;
};
pd_mipi_dsi_i2c1: PD_MIPI_0_DSI_I2C1 {
name = "mipi0_dsi_i2c1";
reg = <SC_R_MIPI_0_I2C_1>;
+ #power-domain-cells = <0>;
power-domains =<&pd_mipi_dsi>;
};
pd_mipi_pwm0: PD_MIPI_0_DSI_PWM0 {
name = "mipi0_dsi_pwm0";
reg = <SC_R_MIPI_0_PWM_0>;
+ #power-domain-cells = <0>;
power-domains =<&pd_mipi_dsi>;
};
};
- pd_mipi_csi: PD_MIPI_CSI0 {
+ pd_isi_ch0: PD_ISI_CH0 {
compatible = "nxp,imx8-pd";
- reg = <SC_R_CSI_0>;
+ reg = <SC_R_ISI_CH0>;
#power-domain-cells = <0>;
#address-cells = <1>;
#size-cells = <0>;
- pd_mipi_csi_i2c0: PD_MIPI_CSI0_I2C {
- name = "mipi_csi0_i2c";
- reg = <SC_R_CSI_0_I2C_0>;
- power-domains =<&pd_mipi_csi>;
- };
- pd_mipi_csi_pwm0: PD_MIPI_CSI0_PWM {
- name = "mipi_csi0_pwm";
- reg = <SC_R_CSI_0_PWM_0>;
- power-domains =<&pd_mipi_dsi>;
+ pd_mipi_csi: PD_MIPI_CSI0 {
+ reg = <SC_R_CSI_0>;
+ #power-domain-cells = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ power-domains =<&pd_isi_ch0>;
+
+ pd_mipi_csi_i2c0: PD_MIPI_CSI0_I2C {
+ name = "mipi_csi0_i2c";
+ reg = <SC_R_CSI_0_I2C_0>;
+ #power-domain-cells = <0>;
+ power-domains =<&pd_mipi_csi>;
+ };
+
+ pd_mipi_csi_pwm0: PD_MIPI_CSI0_PWM {
+ name = "mipi_csi0_pwm";
+ reg = <SC_R_CSI_0_PWM_0>;
+ #power-domain-cells = <0>;
+ power-domains =<&pd_mipi_csi>;
+ };
};
};
};
- rtc: rtc {
- compatible = "fsl,imx-sc-rtc";
+ irqsteer_csi: irqsteer@58220000 {
+ compatible = "nxp,imx-irqsteer";
+ reg = <0x0 0x58220000 0x0 0x1000>;
+ interrupts = <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ interrupt-parent = <&gic>;
+ #interrupt-cells = <2>;
+ clocks = <&clk IMX8QXP_CSI0_IPG_CLK>;
+ clock-names = "ipg";
+ power-domains = <&pd_mipi_csi>;
+ };
+
+ i2c0_csi0: i2c@58226000 {
+ compatible = "fsl,imx8qm-lpi2c";
+ reg = <0x0 0x58226000 0x0 0x1000>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&irqsteer_csi>;
+ clocks = <&clk IMX8QXP_CSI0_I2C0_CLK>,
+ <&clk IMX8QXP_CSI0_I2C0_IPG_CLK>;
+ clock-names = "per", "ipg";
+ assigned-clocks = <&clk IMX8QXP_CSI0_I2C0_CLK>;
+ assigned-clock-rates = <24000000>;
+ power-domains = <&pd_mipi_csi_i2c0>;
+ status = "disabled";
};
i2c0: i2c@5a800000 {
interrupt-parent = <&gic>;
clocks = <&clk IMX8QXP_I2C0_CLK>;
clock-names = "per";
- assigned-clock-names = <&clk IMX8QXP_I2C0_CLK>;
+ assigned-clocks = <&clk IMX8QXP_I2C0_CLK>;
assigned-clock-rates = <24000000>;
power-domains = <&pd_dma_lpi2c0>;
status = "disabled";
reg = <0x0 0x5a810000 0x0 0x4000>;
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
- clocks = <&clk IMX8QXP_I2C1_CLK>;
- clock-names = "per";
- assigned-clock-names = <&clk IMX8QXP_I2C1_CLK>;
+ clocks = <&clk IMX8QXP_I2C1_CLK>,
+ <&clk IMX8QXP_I2C1_IPG_CLK>;
+ clock-names = "per", "ipg";
+ assigned-clocks = <&clk IMX8QXP_I2C1_CLK>;
assigned-clock-rates = <24000000>;
+ power-domains = <&pd_dma_lpi2c1>;
status = "disabled";
};
interrupt-parent = <&gic>;
clocks = <&clk IMX8QXP_I2C2_CLK>;
clock-names = "per";
- assigned-clock-names = <&clk IMX8QXP_I2C2_CLK>;
+ assigned-clocks = <&clk IMX8QXP_I2C2_CLK>;
assigned-clock-rates = <24000000>;
power-domains = <&pd_dma_lpi2c2>;
status = "disabled";
reg = <0x0 0x5a830000 0x0 0x4000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
- clocks = <&clk IMX8QXP_I2C3_CLK>;
- clock-names = "per";
- assigned-clock-names = <&clk IMX8QXP_I2C3_CLK>;
+ clocks = <&clk IMX8QXP_I2C3_CLK>,
+ <&clk IMX8QXP_I2C3_IPG_CLK>;
+ clock-names = "per", "ipg";
+ assigned-clocks = <&clk IMX8QXP_I2C3_CLK>;
assigned-clock-rates = <24000000>;
power-domains = <&pd_dma_lpi2c3>;
status = "disabled";
status = "disabled";
};
+ lpuart3: serial@5a090000 {
+ compatible = "fsl,imx8qm-lpuart";
+ reg = <0x0 0x5a090000 0x0 0x1000>;
+ interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&gic>;
+ clocks = <&clk IMX8QXP_UART3_CLK>, <&clk IMX8QXP_UART3_IPG_CLK>;
+ clock-names = "per", "ipg";
+ assigned-clocks = <&clk IMX8QXP_UART3_CLK>;
+ assigned-clock-rates = <80000000>;
+ power-domains = <&pd_dma_lpuart3>;
+ status = "disabled";
+ };
+
edma2: dma-controller@591F0000 {
compatible = "fsl,imx8qm-edma";
reg = <0x0 0x59200000 0x0 0x10000>, /* asrc0 */
<0x0 0x59280000 0x0 0x10000>, /* spdif0 rx */
<0x0 0x59290000 0x0 0x10000>, /* spdif0 tx */
<0x0 0x592c0000 0x0 0x10000>, /* sai0 rx */
- <0x0 0x592d0000 0x0 0x10000>; /* sai0 tx */
+ <0x0 0x592d0000 0x0 0x10000>, /* sai0 tx */
+ <0x0 0x59350000 0x0 0x10000>,
+ <0x0 0x59370000 0x0 0x10000>;
#dma-cells = <4>;
shared-interrupt;
- dma-channels = <12>;
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc0 */
+ dma-channels = <14>;
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>, /* asrc 0 */
<GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>, /* spdif0 */
<GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, /* sai0 */
- <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
+ <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "edma-chan0-tx", "edma-chan1-tx", /* asrc0 */
"edma-chan2-tx", "edma-chan3-tx",
"edma-chan4-tx", "edma-chan5-tx",
"edma-chan6-tx", "edma-chan7-tx", /* esai0 */
"edma-chan8-tx", "edma-chan9-tx", /* spdif0 */
- "edma-chan12-tx", "edma-chan13-tx"; /* sai0 */
+ "edma-chan12-tx", "edma-chan13-tx", /* sai0 */
+ "edma-chan21-tx", /* gpt5 */
+ "edma-chan23-tx"; /* gpt7 */
status = "okay";
};
fsl,hifi4-firmware = "imx/hifi/hifi4.bin";
power-domains = <&pd_hifi>;
};
+
+ esai0: esai@59010000 {
+ compatible = "fsl,imx6ull-esai";
+ reg = <0x0 0x59010000 0x0 0x10000>;
+ interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8QXP_AUD_ESAI_0_IPG>,
+ <&clk IMX8QXP_AUD_ESAI_0_EXTAL_IPG>,
+ <&clk IMX8QXP_AUD_ESAI_0_IPG>;
+ clock-names = "core", "extal", "fsys";
+ dmas = <&edma2 6 0 1 0>, <&edma2 7 0 0 0>;
+ dma-names = "rx", "tx";
+ power-domains = <&pd_esai0>;
+ status = "disabled";
+ };
};
&A35_0 {
projects / linux.git / commitdiff