<&clk IMX8QM_CAN0_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_CAN0_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan0>;
status = "disabled";
};
<&clk IMX8QM_CAN1_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_CAN1_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan1>;
status = "disabled";
};
<&clk IMX8QM_CAN2_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QM_CAN2_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan2>;
status = "disabled";
};
<&clk IMX8QXP_CAN0_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QXP_CAN0_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan0>;
status = "disabled";
};
<&clk IMX8QXP_CAN0_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QXP_CAN0_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan0>;
status = "disabled";
};
<&clk IMX8QXP_CAN0_CLK>;
clock-names = "ipg", "per";
assigned-clocks = <&clk IMX8QXP_CAN0_CLK>;
- assigned-clock-rates = <24000000>;
+ assigned-clock-rates = <40000000>;
power-domains = <&pd_dma_flexcan0>;
status = "disabled";
};