MLK-16918-14: arm64: dts: fsl-imx8mq-evk: Enable mipi-dsi with lcdif

Enabled LCDIF-DSI-ADV7535 and LCDIF-DSI-RM67191 paths on MX8MQ EVK
development board.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 5015c0c..2e3a361 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -42,7 +42,9 @@ dtb-$(CONFIG_ARCH_FSL_IMX8MQ) += fsl-imx8mq-evk.dtb \
                                 fsl-imx8mq-evk-fbdev.dtb \
                                 fsl-imx8mq-evk-lcdif-dsi.dtb \
                                 fsl-imx8mq-evk-m4.dtb \
-                                fsl-imx8mq-evk-pcie1-m2.dtb
+                                fsl-imx8mq-evk-pcie1-m2.dtb \
+                                fsl-imx8mq-evk-lcdif-adv7535.dtb \
+                                fsl-imx8mq-evk-lcdif-rm67191.dtb
 
 always         := $(dtb-y)
 subdir-y       := $(dts-dirs)

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts
new file mode 100644 (file)
index 0000000..fe34217
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-adv7535.dts
@@ -0,0 +1,84 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8mq-evk.dts"
+
+/ {
+       display-subsystem {
+               status = "disabled";
+       };
+};
+
+&dcss_drm {
+       status = "disabled";
+};
+
+&hdmi_drm {
+       status = "disabled";
+};
+
+&hdmi_cec {
+       status = "disabled";
+};
+
+&lcdif_drm {
+       status = "okay";
+
+       port@0 {
+               lcdif_mipi_dsi: mipi-dsi-endpoint {
+                       remote-endpoint = <&mipi_dsi_in>;
+               };
+       };
+};
+
+&i2c1 {
+       adv_bridge: adv7535@3d {
+               compatible = "adi,adv7533";
+               reg = <0x3d>;
+               adi,dsi-lanes = <4>;
+               status = "okay";
+
+               port {
+                       adv7535_in: endpoint {
+                               remote-endpoint = <&mipi_dsi_bridge_adv>;
+                       };
+               };
+       };
+};
+
+&mipi_dsi_phy_drm {
+       status = "okay";
+};
+
+&mipi_dsi_drm {
+       status = "okay";
+       as_bridge;
+
+       port@1 {
+               mipi_dsi_in: endpoint {
+                       remote-endpoint = <&lcdif_mipi_dsi>;
+               };
+       };
+};
+
+&mipi_dsi_bridge_drm {
+       status = "okay";
+
+       port@1 {
+               mipi_dsi_bridge_adv: endpoint {
+                       remote-endpoint = <&adv7535_in>;
+               };
+       };
+};
+

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts
new file mode 100644 (file)
index 0000000..90c33bd
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-lcdif-rm67191.dts
@@ -0,0 +1,113 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8mq-evk.dts"
+
+/ {
+       display-subsystem {
+               status = "disabled";
+       };
+};
+
+&dcss_drm {
+       status = "disabled";
+};
+
+&hdmi_drm {
+       status = "disabled";
+};
+
+&hdmi_cec {
+       status = "disabled";
+};
+
+&lcdif_drm {
+       status = "okay";
+
+       assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_SRC>,
+                         <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                         <&clk IMX8MQ_VIDEO_PLL1>;
+       assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+                                <&clk IMX8MQ_CLK_25M>;
+       assigned-clock-rate = <120000000>,
+                             <0>,
+                             <599999999>;
+
+       port@0 {
+               lcdif_mipi_dsi: mipi-dsi-endpoint {
+                       remote-endpoint = <&mipi_dsi_in>;
+               };
+       };
+};
+
+&mipi_dsi_phy_drm {
+       status = "okay";
+};
+
+&mipi_dsi_drm {
+       status = "okay";
+       as_bridge;
+       assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF_SRC>,
+                         <&clk IMX8MQ_CLK_DSI_CORE_SRC>,
+                         <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
+                         <&clk IMX8MQ_VIDEO_PLL1>;
+       assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
+                                <&clk IMX8MQ_SYS1_PLL_266M>,
+                                <&clk IMX8MQ_CLK_25M>;
+       assigned-clock-rates = <24000000>,
+                              <266000000>,
+                              <0>,
+                              <599999999>;
+
+       port@1 {
+               mipi_dsi_in: endpoint {
+                       remote-endpoint = <&lcdif_mipi_dsi>;
+               };
+       };
+};
+
+&mipi_dsi_bridge_drm {
+       status = "okay";
+
+       panel@0 {
+               compatible = "raydium,rm67191";
+               reg = <0>;
+               pinctrl-0 = <&pinctrl_mipi_dsi_en>;
+               reset-gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>;
+               dsi-lanes = <4>;
+               panel-width-mm = <68>;
+               panel-height-mm = <121>;
+               port {
+                       panel1_in: endpoint {
+                               remote-endpoint = <&mipi_dsi_bridge_out>;
+                       };
+               };
+       };
+
+       port@1 {
+               mipi_dsi_bridge_out: endpoint {
+                       remote-endpoint = <&panel1_in>;
+               };
+       };
+};
+
+&iomuxc {
+       imx8mq-evk {
+               pinctrl_mipi_dsi_en: mipi_dsi_en {
+                       fsl,pins = <
+                               MX8MQ_IOMUXC_ECSPI1_SCLK_GPIO5_IO6      0x16
+                       >;
+               };
+       };
+};

diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
index 6eceeb4..571225b 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
@@ -526,6 +526,20 @@
                status = "disabled";
        };
 
+       lcdif_drm: lcdif_drm@30320000 {
+               compatible = "fsl,imx8mq-lcdif", "fsl,imx28-lcdif";
+               reg = <0x0 0x30320000 0x0 0x10000>;
+               clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_DIV>,
+                        <&clk IMX8MQ_CLK_DUMMY>,
+                        <&clk IMX8MQ_CLK_DUMMY>;
+               clock-names = "pix", "axi", "disp_axi";
+               assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_SRC>;
+               assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
+               assigned-clock-rate = <594000000>;
+               interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+       };
+
        mipi_dsi_phy_drm: dsi_phy_drm@30A00300 {
                #address-cells = <1>;
                #size-cells = <0>;