ARM: dts: rockchip: Add pin names for rk3288-veyron-jerry

This is like the same change for rk3288-veyron-minnie.  See that patch
for more details.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288-veyron-jerry.dts b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
index b1613af..164561f 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-jerry.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-jerry.dts
@@ -103,6 +103,213 @@
        pinctrl-0 = <&vcc50_hdmi_en>;
 };
 
+&gpio0 {
+       gpio-line-names = "PMIC_SLEEP_AP",
+                         "DDRIO_PWROFF",
+                         "DDRIO_RETEN",
+                         "TS3A227E_INT_L",
+                         "PMIC_INT_L",
+                         "PWR_KEY_L",
+                         "AP_LID_INT_L",
+                         "EC_IN_RW",
+
+                         "AC_PRESENT_AP",
+                         /*
+                          * RECOVERY_SW_L is Chrome OS ABI.  Schematics call
+                          * it REC_MODE_L.
+                          */
+                         "RECOVERY_SW_L",
+                         "OTP_OUT",
+                         "HOST1_PWR_EN",
+                         "USBOTG_PWREN_H",
+                         "AP_WARM_RESET_H",
+                         "nFAULT2",
+                         "I2C0_SDA_PMIC",
+
+                         "I2C0_SCL_PMIC",
+                         "SUSPEND_L",
+                         "USB_INT";
+};
+
+&gpio2 {
+       gpio-line-names = "CONFIG0",
+                         "CONFIG1",
+                         "CONFIG2",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "CONFIG3",
+
+                         "",
+                         "EMMC_RST_L",
+                         "",
+                         "",
+                         "BL_PWR_EN",
+                         "AVDD_1V8_DISP_EN";
+};
+
+&gpio3 {
+       gpio-line-names = "FLASH0_D0",
+                         "FLASH0_D1",
+                         "FLASH0_D2",
+                         "FLASH0_D3",
+                         "FLASH0_D4",
+                         "FLASH0_D5",
+                         "FLASH0_D6",
+                         "FLASH0_D7",
+
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+
+                         "FLASH0_CS2/EMMC_CMD",
+                         "",
+                         "FLASH0_DQS/EMMC_CLKO";
+};
+
+&gpio4 {
+       gpio-line-names = "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+
+                         "UART0_RXD",
+                         "UART0_TXD",
+                         "UART0_CTS",
+                         "UART0_RTS",
+                         "SDIO0_D0",
+                         "SDIO0_D1",
+                         "SDIO0_D2",
+                         "SDIO0_D3",
+
+                         "SDIO0_CMD",
+                         "SDIO0_CLK",
+                         "BT_DEV_WAKE",
+                         "",
+                         "WIFI_ENABLE_H",
+                         "BT_ENABLE_L",
+                         "WIFI_HOST_WAKE",
+                         "BT_HOST_WAKE";
+};
+
+&gpio5 {
+       gpio-line-names = "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+                         "",
+
+                         "",
+                         "",
+                         "",
+                         "",
+                         "SPI0_CLK",
+                         "SPI0_CS0",
+                         "SPI0_TXD",
+                         "SPI0_RXD",
+
+                         "",
+                         "",
+                         "",
+                         "VCC50_HDMI_EN";
+};
+
+&gpio6 {
+       gpio-line-names = "I2S0_SCLK",
+                         "I2S0_LRCK_RX",
+                         "I2S0_LRCK_TX",
+                         "I2S0_SDI",
+                         "I2S0_SDO0",
+                         "HP_DET_H",
+                         "",
+                         "INT_CODEC",
+
+                         "I2S0_CLK",
+                         "I2C2_SDA",
+                         "I2C2_SCL",
+                         "MICDET",
+                         "",
+                         "",
+                         "",
+                         "",
+
+                         "SDMMC_D0",
+                         "SDMMC_D1",
+                         "SDMMC_D2",
+                         "SDMMC_D3",
+                         "SDMMC_CLK",
+                         "SDMMC_CMD";
+};
+
+&gpio7 {
+       gpio-line-names = "LCDC_BL",
+                         "PWM_LOG",
+                         "BL_EN",
+                         "TRACKPAD_INT",
+                         "TPM_INT_H",
+                         "SDMMC_DET_L",
+                         /*
+                          * AP_FLASH_WP_L is Chrome OS ABI.  Schematics call
+                          * it FW_WP_AP.
+                          */
+                         "AP_FLASH_WP_L",
+                         "EC_INT",
+
+                         "CPU_NMI",
+                         "DVSOK",
+                         "",
+                         "EDP_HPD",
+                         "DVS1",
+                         "nFAULT1",
+                         "LCD_EN",
+                         "DVS2",
+
+                         "VCC5V_GOOD_H",
+                         "I2C4_SDA_TP",
+                         "I2C4_SCL_TP",
+                         "I2C5_SDA_HDMI",
+                         "I2C5_SCL_HDMI",
+                         "5V_DRV",
+                         "UART2_RXD",
+                         "UART2_TXD";
+};
+
+&gpio8 {
+       gpio-line-names = "RAM_ID0",
+                         "RAM_ID1",
+                         "RAM_ID2",
+                         "RAM_ID3",
+                         "I2C1_SDA_TPM",
+                         "I2C1_SCL_TPM",
+                         "SPI2_CLK",
+                         "SPI2_CS0",
+
+                         "SPI2_RXD",
+                         "SPI2_TXD";
+};
+
 &pinctrl {
        backlight {
                bl_pwr_en: bl_pwr_en {