MLK-13365 pci: imx: fix imx6dl ep rc validation failure

The ep rc validation is failed on imx6dl.
Root cause:
The ref clk of imx6dl pcie is 100M(bit20 of PLL_ENET).
But the driver doesn't enable it.
Solution:
enable pci_bus clock in ep rc validation system, since
the parent of the pci_bus is the 100M.
The connection between ep and rc only have the TX/RX
parirs, there is no impaction when enable the pcie_bus
in pcie ep rc validation system.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index ed0ed75..9cb7ba1 100644 (file)
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -421,22 +421,19 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
                return;
        }
 
-       if (!IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS) &&
-           !IS_ENABLED(CONFIG_RC_MODE_IN_EP_RC_SYS)) {
-               if (imx6_pcie->ext_osc) {
-                       clk_set_parent(imx6_pcie->pcie_ext,
-                                      imx6_pcie->pcie_ext_src);
-                       ret = clk_prepare_enable(imx6_pcie->pcie_ext);
-                       if (ret) {
-                               dev_err(dev, "unable to enable pcie_ext clock\n");
-                               goto err_pcie_bus;
-                       }
-               } else {
-                       ret = clk_prepare_enable(imx6_pcie->pcie_bus);
-                       if (ret) {
-                               dev_err(dev, "unable to enable pcie_bus clock\n");
-                               goto err_pcie_bus;
-                       }
+       if (imx6_pcie->ext_osc) {
+               clk_set_parent(imx6_pcie->pcie_ext,
+                               imx6_pcie->pcie_ext_src);
+               ret = clk_prepare_enable(imx6_pcie->pcie_ext);
+               if (ret) {
+                       dev_err(pp->dev, "unable to enable pcie_ext clock\n");
+                       goto err_pcie_bus;
+               }
+       } else {
+               ret = clk_prepare_enable(imx6_pcie->pcie_bus);
+               if (ret) {
+                       dev_err(pp->dev, "unable to enable pcie_bus clock\n");
+                       goto err_pcie_bus;
                }
        }
 
@@ -524,9 +521,7 @@ static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
 err_ref_clk:
        clk_disable_unprepare(imx6_pcie->pcie_phy);
 err_pcie_phy:
-       if (!IS_ENABLED(CONFIG_EP_MODE_IN_EP_RC_SYS)
-                       && !IS_ENABLED(CONFIG_RC_MODE_IN_EP_RC_SYS)
-                       && !imx6_pcie->ext_osc)
+       if (!imx6_pcie->ext_osc)
                clk_disable_unprepare(imx6_pcie->pcie_bus);
 err_pcie_bus:
        clk_disable_unprepare(imx6_pcie->pcie);
@@ -628,7 +623,8 @@ static int imx6_pcie_wait_for_link(struct imx6_pcie *imx6_pcie)
 
        if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) {
                clk_disable_unprepare(imx6_pcie->pcie);
-               clk_disable_unprepare(imx6_pcie->pcie_bus);
+               if (!imx6_pcie->ext_osc)
+                       clk_disable_unprepare(imx6_pcie->pcie_bus);
                clk_disable_unprepare(imx6_pcie->pcie_phy);
                if (imx6_pcie->variant == IMX6SX)
                        clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);