MLK-15323-4: imx8m: evk: invoke board_late_mmc_env_init
authorPeng Fan <peng.fan@nxp.com>
Mon, 3 Jul 2017 09:19:33 +0000 (17:19 +0800)
committerJason Liu <jason.hui.liu@nxp.com>
Thu, 2 Nov 2017 18:36:59 +0000 (02:36 +0800)
Invoke board_late_mmc_init to support dynamically changing mmcroot.
Add board_mmc_get_env_dev to read/save env into correct mmc/sd device.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
board/freescale/imx8mq_evk/ddr/lpddr4_pub_train_0608_simple.c
board/freescale/imx8mq_evk/imx8m_evk.c

index 1786193..f3ef365 100644 (file)
@@ -127,11 +127,11 @@ void lpddr4_800MHz_cfg_umctl2(void)
         /* performance setting */
        dwc_ddrphy_apb_wr(DDRC_ODTCFG(0), 0x0b060908);
        dwc_ddrphy_apb_wr(DDRC_ODTMAP(0), 0x00000000);
-       dwc_ddrphy_apb_wr(DDRC_SCHED(0), 0x29511505);
-       dwc_ddrphy_apb_wr(DDRC_SCHED1(0), 0x0000002c);
-       dwc_ddrphy_apb_wr(DDRC_PERFHPR1(0), 0x5900575b);
-       dwc_ddrphy_apb_wr(DDRC_PERFLPR1(0), 0x900093e7);
-       dwc_ddrphy_apb_wr(DDRC_PERFWR1(0), 0x02005574);
+       dwc_ddrphy_apb_wr(DDRC_SCHED(0), 0x00001005);
+       dwc_ddrphy_apb_wr(DDRC_SCHED1(0), 0x00000040);
+       dwc_ddrphy_apb_wr(DDRC_PERFHPR1(0), 0x20000800);
+       dwc_ddrphy_apb_wr(DDRC_PERFLPR1(0), 0x20000800);
+       dwc_ddrphy_apb_wr(DDRC_PERFWR1(0), 0x20000800);
        dwc_ddrphy_apb_wr(DDRC_DBG0(0), 0x00000016);
        dwc_ddrphy_apb_wr(DDRC_DBG1(0), 0x00000000);
        dwc_ddrphy_apb_wr(DDRC_DBGCMD(0), 0x00000000);
index 0e6bf05..a345d9e 100644 (file)
@@ -375,7 +375,9 @@ int board_late_init(void)
 
        set_wdog_reset(wdog);
 
+#ifdef CONFIG_ENV_IS_IN_MMC
        board_late_mmc_env_init();
+#endif
 
        return 0;
 }