drm/meson: fix G12A primary plane disabling
authorNeil Armstrong <narmstrong@baylibre.com>
Wed, 5 Jun 2019 14:12:53 +0000 (16:12 +0200)
committerNeil Armstrong <narmstrong@baylibre.com>
Fri, 7 Jun 2019 08:05:05 +0000 (10:05 +0200)
The G12A Primary plane was disabled by writing in the OSD1 configuration
registers, but this caused the plane blender to stall instead of continuing
to blend only the overlay plane.

Fix this by disabling the OSD1 plane in the blender registers, and also
enabling it back using the same register.

Fixes: 490f50c109d1 ("drm/meson: Add G12A support for OSD1 Plane")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
[narmstrong: fixed nit in commit log]
Link: https://patchwork.freedesktop.org/patch/msgid/20190605141253.24165-3-narmstrong@baylibre.com
drivers/gpu/drm/meson/meson_crtc.c
drivers/gpu/drm/meson/meson_plane.c
drivers/gpu/drm/meson/meson_viu.c

index 50a9a96..aa8ea10 100644 (file)
@@ -252,6 +252,8 @@ static void meson_g12a_crtc_enable_osd1(struct meson_drm *priv)
        writel_relaxed(priv->viu.osb_blend1_size,
                       priv->io_base +
                       _REG(VIU_OSD_BLEND_BLEND1_SIZE));
+       writel_bits_relaxed(3 << 8, 3 << 8,
+                           priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
 }
 
 static void meson_crtc_enable_vd1(struct meson_drm *priv)
index b788280..d90427b 100644 (file)
@@ -318,8 +318,8 @@ static void meson_plane_atomic_disable(struct drm_plane *plane,
 
        /* Disable OSD1 */
        if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu"))
-               writel_bits_relaxed(BIT(0) | BIT(21), 0,
-                       priv->io_base + _REG(VIU_OSD1_CTRL_STAT));
+               writel_bits_relaxed(3 << 8, 0,
+                                   priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
        else
                writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0,
                                    priv->io_base + _REG(VPP_MISC));
index 462c7cb..4b2b302 100644 (file)
@@ -405,8 +405,7 @@ void meson_viu_init(struct meson_drm *priv)
                                0 << 16 |
                                1,
                                priv->io_base + _REG(VIU_OSD_BLEND_CTRL));
-               writel_relaxed(3 << 8 |
-                               1 << 20,
+               writel_relaxed(1 << 20,
                                priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
                writel_relaxed(1 << 20,
                                priv->io_base + _REG(OSD2_BLEND_SRC_CTRL));