Value type: <string>
Definition: Must include "fsl,sec-v4.0-ctrl".
+ platform precision:
+ - "fsl,imx7d-caam"
+
- reg
Usage: required
Value type: <prop-encoded-array>
reg = <0x00100000 0x4000>;
};
+=====================================================================
+Secure memory (SM) Node
+
+ - compatible
+ Usage: required
+ Value type: <string>
+ Definition: Must include "fsl,imx6q-caam-sm"
+
+ - reg
+ Usage: required
+ Value type: <prop-encoded-array>
+ Definition: Specifies a two SM parameters: an offset from
+ the parent physical address and the length the SM registers.
+
+EXAMPLE
+ caam_sm: caam-sm@00100000 {
+ compatible = "fsl,imx6q-caam-sm";
+ reg = <0x00100000 0x4000>;
+ };
+
=====================================================================
Run Time Integrity Check (RTIC) Node
status = "okay";
};
+ crypto: caam@40240000 {
+ compatible = "fsl,imx7d-caam", "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x40240000 0x40000>;
+ ranges = <0 0x40240000 0x40000>;
+ clocks = <&clks IMX7ULP_CLK_CAAM>,
+ <&clks IMX7ULP_CLK_NIC1_DIV>;
+ clock-names = "ipg", "aclk";
+
+ sec_ctrl: ctrl@0 {
+ /* CAAM Page 0 only accessible */
+ /* by secure world */
+ compatible = "fsl,sec-v4.0-ctrl";
+ reg = <0x40240000 0x1000>;
+ secure-status = "okay";
+ status = "disabled";
+ };
+
+ sec_jr0: jr0@1000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr1@2000 {
+ compatible = "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+ };
+ };
+
rpmsg: rpmsg{
compatible = "fsl,imx7ulp-rpmsg";
memory-region = <&rpmsg_reserved>;