MLK-19053: crypto: caam: RNG4 TRNG errata

  The TRNG as used in RNG4, used in CAAM has a documentation issue. The
 effect is that it is possible that the entropy used to instantiate the
 DRBG may be old entropy, rather than newly generated entropy. There is
 proper programming guidance, but it is not in the documentation.

Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
(cherry picked from commit 2aff5ffb2c4bb19106f3faa76415b51591cbc2b2)

diff --git a/drivers/crypto/fsl_caam.c b/drivers/crypto/fsl_caam.c
index c176294..a513ba1 100644 (file)
--- a/drivers/crypto/fsl_caam.c
+++ b/drivers/crypto/fsl_caam.c
@@ -339,7 +339,12 @@ static void kick_trng(u32 ent_delay)
        u32 val;
 
        /* Put RNG in program mode */
-       setbits_le32(CAAM_RTMCTL, RTMCTL_PGM);
+       /* Setting both RTMCTL:PRGM and RTMCTL:TRNG_ACC causes TRNG to
+        * properly invalidate the entropy in the entropy register and
+        * force re-generation.
+        */
+       setbits_le32(CAAM_RTMCTL, RTMCTL_PGM | RTMCTL_ACC);
+
        /* Configure the RNG Entropy Delay
         * Performance-wise, it does not make sense to
         * set the delay to a value that is lower
@@ -353,7 +358,7 @@ static void kick_trng(u32 ent_delay)
        val >>= BS_TRNG_ENT_DLY;
        if (ent_delay < val) {
                /* Put RNG4 into run mode */
-               clrbits_le32(CAAM_RTMCTL, RTMCTL_PGM);
+               clrbits_le32(CAAM_RTMCTL, RTMCTL_PGM | RTMCTL_ACC);
                return;
        }
 
@@ -385,7 +390,7 @@ static void kick_trng(u32 ent_delay)
        val &= ~BM_TRNG_SAMP_MODE;
        val |= TRNG_SAMP_MODE_RAW_ES_SC;
        /* Put RNG4 into run mode */
-       val &= ~RTMCTL_PGM;
+       val &= ~(RTMCTL_PGM | RTMCTL_ACC);
 /*test with sample mode only */
        __raw_writel(val, CAAM_RTMCTL);
 

diff --git a/drivers/crypto/fsl_caam_internal.h b/drivers/crypto/fsl_caam_internal.h
index 852672d..36885da 100644 (file)
--- a/drivers/crypto/fsl_caam_internal.h
+++ b/drivers/crypto/fsl_caam_internal.h
@@ -147,6 +147,7 @@
 #define RTMCTL_PGM       BIT(16)
 #define RTMCTL_ERR       BIT(12)
 #define RTMCTL_RST       BIT(6)
+#define RTMCTL_ACC       BIT(5)
 #define RDSTA_IF0        (1)
 #define RDSTA_IF1        (2)
 #define RDSTA_SKVN       BIT(30)