MA-14989-1 Add 2GB ddr support for AIY
authorJi Luo <ji.luo@nxp.com>
Mon, 17 Jun 2019 12:27:40 +0000 (20:27 +0800)
committerJi Luo <ji.luo@nxp.com>
Wed, 24 Jul 2019 05:35:16 +0000 (13:35 +0800)
Add support for AIY 2GB DDR size. Wrap support for
3GB DDR board with CONFIG_AIY_LPDDR4_3G because of
the limited ocram size.

Test: build and boot on 2GB AIY board.

Change-Id: I04da60cc0d0b22c6c32ff705bcab4095068ba6ea
Signed-off-by: Ji Luo <ji.luo@nxp.com>
common/spl/spl_fit.c
scripts/config_whitelist.txt

index 71a00b8..d55d833 100644 (file)
@@ -161,13 +161,12 @@ static int get_aligned_image_size(struct spl_load_info *info, int data_size,
        return (data_size + info->bl_len - 1) / info->bl_len;
 }
 
-#if defined(CONFIG_DUAL_BOOTLOADER) && defined(CONFIG_IMX_TRUSTY_OS)
+#ifdef CONFIG_IMX_TRUSTY_OS
 __weak int get_tee_load(ulong *load)
 {
        /* default return ok */
        return 0;
 }
-
 #endif
 
 /**
@@ -222,7 +221,7 @@ static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
        if (fit_image_get_load(fit, node, &load_addr))
                load_addr = image_info->load_addr;
 
-#if defined(CONFIG_DUAL_BOOTLOADER) && defined(CONFIG_IMX_TRUSTY_OS)
+#ifdef CONFIG_IMX_TRUSTY_OS
        char *desc = NULL;
 
        if (fit_get_desc(fit, node, &desc)) {
index fccaed6..18987cc 100644 (file)
@@ -20,6 +20,7 @@ CONFIG_ADDR_MAP
 CONFIG_ADNPESC1
 CONFIG_AEABI
 CONFIG_AEMIF_CNTRL_BASE
+CONFIG_AIY_LPDDR4_3G
 CONFIG_ALTERA_SPI_IDLE_VAL
 CONFIG_ALTIVEC
 CONFIG_ALU