Add a new dts imx8mn-ddr4-evk-rm67191.dts to support the
mipi panel RM67191 display on IMX8MN DDR4 EVK board.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
-dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb imx8mn-ddr4-evk-ak5558.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb imx8mn-ddr4-evk-ak5558.dtb imx8mn-ddr4-evk-rm67191.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb
--- /dev/null
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2018-2019 NXP
+ */
+
+#include "imx8mn-ddr4-evk.dts"
+
+&adv_bridge {
+ status = "disabled";
+};
+
+&mipi_dsi {
+ panel@0 {
+ compatible = "raydium,rm67191";
+ reg = <0>;
+ pinctrl-0 = <&pinctrl_mipi_dsi_en>;
+ reset-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ dsi-lanes = <4>;
+ video-mode = <2>; /* 0: burst mode
+ * 1: non-burst mode with sync event
+ * 2: non-burst mode with sync pulse
+ */
+ panel-width-mm = <68>;
+ panel-height-mm = <121>;
+ status = "okay";
+ };
+};
>;
};
+ pinctrl_mipi_dsi_en: mipi_dsi_en {
+ fsl,pins = <
+ MX8MN_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x16
+ >;
+ };
+
pinctrl_pdm: pdmgrp {
fsl,pins = <
MX8MN_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6