MGS-2914 [#imx-587] [8QM/qxp] Disable depth compression only for 8QM
authorYuchou Gan <yuchou.gan@nxp.com>
Mon, 11 Dec 2017 16:24:13 +0000 (00:24 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Tue, 20 Mar 2018 19:51:10 +0000 (14:51 -0500)
Disable the depth compression on device tree for 8qm/8qxp/mscale
when the ddr4 is enabled.

Date: Dec 11, 2017
Signed-off-by Yuchou Gan yuchou.gan@nxp.com

arch/arm64/boot/dts/freescale/fsl-imx8mq.dtsi
arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
arch/arm64/boot/dts/freescale/fsl-imx8qxp.dtsi
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
drivers/mxc/gpu-viv/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6.c

index fea6b59..3778e9e 100644 (file)
                assigned-clock-parents = <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>;
                assigned-clock-rates = <800000000>, <800000000>, <800000000>, <800000000>;
                power-domains = <&gpu_pd>;
+               depth-compression = <0>;
                status = "disabled";
        };
 
index 4f69421..f5d701b 100644 (file)
                cores = <&gpu_3d0>, <&gpu_3d1>;
                reg = <0x0 0x80000000 0x0 0x80000000>, <0x0 0x0 0x0 0x8000000>;
                reg-names = "phys_baseaddr", "contiguous_mem";
+               depth-compression = <0>;
                status = "disabled";
        };
 
index b983d3b..d7ea6c4 100644 (file)
                cores = <&gpu_3d0>;
                reg = <0x0 0x80000000 0x0 0x80000000>, <0x0 0x0 0x0 0x8000000>;
                reg-names = "phys_baseaddr", "contiguous_mem";
+               depth-compression = <0>;
                status = "disabled";
        };
 
index 05474e7..b96e260 100644 (file)
@@ -915,7 +915,7 @@ static int gpu_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
     memcpy(moduleParam.registerBases, registerBases, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
     memcpy(moduleParam.registerSizes, registerSizes, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
     memcpy(moduleParam.chipIDs, chipIDs, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
-    moduleParam.compression = (compression == -1) ? gcvCOMPRESSION_OPTION_DEFAULT : (gceCOMPRESSION_OPTION)compression;
+    moduleParam.compression = compression;
     platform->device = pdev;
 #if USE_LINUX_PCIE
     if (pci_enable_device(pdev)) {
index 9869fc1..b9b7633 100644 (file)
@@ -857,6 +857,18 @@ static int patch_param(struct platform_device *pdev,
 #endif
         patch_param_imx6(pdev, args);
 
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
+    if(args->compression == -1)
+    {
+        const u32 *property;
+        args->compression = gcvCOMPRESSION_OPTION_DEFAULT;
+        property = of_get_property(pdev->dev.of_node, "depth-compression", NULL);
+        if (property && *property == 0)
+        {
+            args->compression &= ~gcvCOMPRESSION_OPTION_DEPTH;
+        }
+    }
+#endif
     res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phys_baseaddr");
 
     if (res && !args->baseAddress && !args->physSize) {