assigned-clock-parents = <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>, <&clk IMX8MQ_GPU_PLL_OUT>;
assigned-clock-rates = <800000000>, <800000000>, <800000000>, <800000000>;
power-domains = <&gpu_pd>;
+ depth-compression = <0>;
status = "disabled";
};
cores = <&gpu_3d0>, <&gpu_3d1>;
reg = <0x0 0x80000000 0x0 0x80000000>, <0x0 0x0 0x0 0x8000000>;
reg-names = "phys_baseaddr", "contiguous_mem";
+ depth-compression = <0>;
status = "disabled";
};
cores = <&gpu_3d0>;
reg = <0x0 0x80000000 0x0 0x80000000>, <0x0 0x0 0x0 0x8000000>;
reg-names = "phys_baseaddr", "contiguous_mem";
+ depth-compression = <0>;
status = "disabled";
};
memcpy(moduleParam.registerBases, registerBases, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
memcpy(moduleParam.registerSizes, registerSizes, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
memcpy(moduleParam.chipIDs, chipIDs, gcmSIZEOF(gctUINT) * gcvCORE_COUNT);
- moduleParam.compression = (compression == -1) ? gcvCOMPRESSION_OPTION_DEFAULT : (gceCOMPRESSION_OPTION)compression;
+ moduleParam.compression = compression;
platform->device = pdev;
#if USE_LINUX_PCIE
if (pci_enable_device(pdev)) {
#endif
patch_param_imx6(pdev, args);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
+ if(args->compression == -1)
+ {
+ const u32 *property;
+ args->compression = gcvCOMPRESSION_OPTION_DEFAULT;
+ property = of_get_property(pdev->dev.of_node, "depth-compression", NULL);
+ if (property && *property == 0)
+ {
+ args->compression &= ~gcvCOMPRESSION_OPTION_DEPTH;
+ }
+ }
+#endif
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phys_baseaddr");
if (res && !args->baseAddress && !args->physSize) {