MLK-16443 imx8qm/qxp: Fix UART pad setting

Found kernel won't be loaded when UART does not connect to the board. This is
because UART received one data with frame error in this case, and stop in
u-boot console.
The root cause is we set wrong pad setting for UART. The pad should be set
to pull up not pull down. The pull down will cause problem to UART START bit.

This patch fix the UART pad to 0x600020 (input and output, high drive strength,
and pull up).

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

diff --git a/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts
index 4730b27..b46342b 100644 (file)
--- a/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts
@@ -132,10 +132,10 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_DMA_UART0_RX              0x0600004c
-                               SC_P_UART0_TX_DMA_UART0_TX              0x0600004c
-                               SC_P_UART0_RTS_B_DMA_UART0_RTS_B        0x0600004c
-                               SC_P_UART0_CTS_B_DMA_UART0_CTS_B        0x0600004c
+                               SC_P_UART0_RX_DMA_UART0_RX              0x06000020
+                               SC_P_UART0_TX_DMA_UART0_TX              0x06000020
+                               SC_P_UART0_RTS_B_DMA_UART0_RTS_B        0x06000020
+                               SC_P_UART0_CTS_B_DMA_UART0_CTS_B        0x06000020
                        >;
                };
 

diff --git a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
index c807a54..e42e200 100644 (file)
--- a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
+++ b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts
@@ -120,8 +120,8 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600004c
-                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600004c
+                               SC_P_UART0_RX_ADMA_UART0_RX     0x06000020
+                               SC_P_UART0_TX_ADMA_UART0_TX     0x06000020
                        >;
                };
 

diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-mek.dts
index 064ecb8..edc201c 100644 (file)
--- a/arch/arm/dts/fsl-imx8qxp-mek.dts
+++ b/arch/arm/dts/fsl-imx8qxp-mek.dts
@@ -61,8 +61,8 @@
 
                pinctrl_lpuart0: lpuart0grp {
                        fsl,pins = <
-                               SC_P_UART0_RX_ADMA_UART0_RX     0x0600004c
-                               SC_P_UART0_TX_ADMA_UART0_TX     0x0600004c
+                               SC_P_UART0_RX_ADMA_UART0_RX     0x06000020
+                               SC_P_UART0_TX_ADMA_UART0_TX     0x06000020
                        >;
                };
 

diff --git a/board/freescale/imx8qm_arm2/imx8qm_arm2.c b/board/freescale/imx8qm_arm2/imx8qm_arm2.c
index 18736a0..2a1457e 100644 (file)
--- a/board/freescale/imx8qm_arm2/imx8qm_arm2.c
+++ b/board/freescale/imx8qm_arm2/imx8qm_arm2.c
@@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
                                                | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 #define UART_PAD_CTRL  ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
-                                               | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT))
+                                               | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 static iomux_cfg_t uart0_pads[] = {
        SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),

diff --git a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
index e584374..0ee22da 100644 (file)
--- a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
+++ b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c
@@ -58,7 +58,7 @@ DECLARE_GLOBAL_DATA_PTR;
                                                | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 #define UART_PAD_CTRL  ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
-                                               | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT))
+                                               | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 static iomux_cfg_t uart0_pads[] = {
        SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),

diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index 3da4571..91a2024 100644 (file)
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR;
                                                | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 #define UART_PAD_CTRL  ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \
-                                               | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT))
+                                               | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
 
 static iomux_cfg_t uart0_pads[] = {
        SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),