CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8X_17X17_VAL=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_EFI_PARTITION=n
+CONFIG_SPL_DOS_PARTITION=n
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8X_17X17_VAL=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_EFI_PARTITION=n
+CONFIG_SPL_DOS_PARTITION=n
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8QXP_DDR3_ARM2=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_EFI_PARTITION=n
+CONFIG_SPL_DOS_PARTITION=n
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8QXP_LPDDR4_ARM2=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_EFI_PARTITION=n
+CONFIG_SPL_DOS_PARTITION=n
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8QXP_LPDDR4_ARM2=y
-CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SPL_SPI_FLASH_TINY=y
+CONFIG_SPL_EFI_PARTITION=n
+CONFIG_SPL_DOS_PARTITION=n
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
CONFIG_FIT=y
-CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
CONFIG_SPL_BOARD_INIT=y
-CONFIG_SPL_SYS_MALLOC_SIMPLE=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_ARM=y
CONFIG_ARCH_IMX8=y
CONFIG_SYS_TEXT_BASE=0x80020000
-CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x8000
CONFIG_TARGET_IMX8QXP_LPDDR4_ARM2=y
+CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_DMA_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL=y
+CONFIG_PANIC_HANG=y
CONFIG_NR_DRAM_BANKS=4
+CONFIG_FIT=y
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_arm2/imximage.cfg"
CONFIG_BOOTDELAY=3
CONFIG_LOG=y
+CONFIG_SPL_BOARD_INIT=y
+# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_POWER_DOMAIN=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CPU=y
# CONFIG_CMD_IMPORTENV is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
+CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-lpddr4-arm2-gpmi-nand"
CONFIG_DEFAULT_FDT_FILE="fsl-imx8qxp-lpddr4-arm2-gpmi-nand.dtb"
CONFIG_ENV_IS_IN_NAND=y
+CONFIG_SPL_DM=y
CONFIG_CLK_IMX8=y
CONFIG_CPU=y
CONFIG_DM_GPIO=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
+
CONFIG_EFI_PARTITION=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
-CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_IMX8=y
CONFIG_POWER_DOMAIN=y
CONFIG_IMX8_POWER_DOMAIN=y
CONFIG_DM_REGULATOR=y
-CONFIG_SPL_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SPL_DM_REGULATOR_GPIO=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
CONFIG_SPL_TINY_MEMSET=y
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SPL_TEXT_BASE 0x0
-#define CONFIG_SPL_MAX_SIZE (124 * 1024)
+#define CONFIG_PARSE_CONTAINER
+#define CONFIG_SPL_TEXT_BASE 0x100000
+#define CONFIG_SPL_MAX_SIZE (128 * 1024)
#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS (0x8000000) /*Put the FIT out of first 128MB boot area */
+#define CONFIG_SPL_NAND_BOOT
+#define CONFIG_SYS_NAND_U_BOOT_DST 0x80000000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE (1024 * 1024 )
+#define CONFIG_SYS_NAND_U_BOOT_START 0x80000000
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (32K + 2Mb)/sector_size */
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
-
-#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
-#define CONFIG_SPL_STACK 0x013E000
-#define CONFIG_SPL_BSS_START_ADDR 0x00138000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x8000 /* 20 KB */
-#define CONFIG_SYS_SPL_MALLOC_START 0x00120000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x18000 /* 60 KB */
-#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x1040 /* (32K + 2Mb)/sector_size */
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x200000
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0
+
+#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
+/*
+ * The memory layout on stack: DATA section save + gd + early malloc
+ * the idea is re-use the early malloc (CONFIG_SYS_MALLOC_F_LEN) with
+ * CONFIG_SYS_SPL_MALLOC_START
+ */
+#define CONFIG_SPL_STACK 0x0130000
+#define CONFIG_SPL_BSS_START_ADDR 0x00120000
+#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
+#define CONFIG_SYS_SPL_MALLOC_START 0x00128000
+#define CONFIG_SYS_SPL_MALLOC_SIZE 0x18000 /* 96 KB */
+#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CONFIG_SYS_ICACHE_OFF
#define CONFIG_SYS_DCACHE_OFF
-#define CONFIG_MALLOC_F_ADDR 0x00120000 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR 0x00128000
#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE