MLK-25282-2 clk: imx8mp: remove the pcie phy clock
authorRichard Zhu <hongxing.zhu@nxp.com>
Sun, 7 Feb 2021 03:09:07 +0000 (11:09 +0800)
committerRichard Zhu <hongxing.zhu@nxp.com>
Fri, 9 Apr 2021 03:23:11 +0000 (11:23 +0800)
commitfee6cef402a581bcc5dbe73e3c45a805b5fb13a0
tree0ca39ded24bc6b9576b9a5d220e15d57ecbb6bc6
parent835b7ab25106447b7060d7915d8ad390f9b9ea1f
MLK-25282-2 clk: imx8mp: remove the pcie phy clock

In the i.MX8MP PCIe design, the PCIe PHY REF clock comes from external
OSC or internal system PLL. It is configured in the IOMUX_GPR14 register
directly, and can't be contolled by CCM at all.
Remove it from clock driver to clean up codes.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Jason Liu <jason.hui.liu@nxp.com>
drivers/clk/imx/clk-imx8mp.c