MLK-18848-2: drm: imx: dcss: swap vblank and ctxld_kick interrupts

MLK-18848-2: drm: imx: dcss: swap vblank and ctxld_kick interrupts

During boot time, the interrupt latency can reach 20ms due to UART
holding the interrupts disabled. If, during this time, VBLANK (LINE_0)
and CTXLD_KICK (LINE_1) are triggered, the handlers will be called in
the order of the irq_steer lines (vblank handler first and ctxld_kick
second). This may lead to "vblank wait timed out" warning messages from
DRM core, because the 50ms wait time is exceeded. Especially when
display is lower than 30fps.

Swapping the interrupt lines will have the ctxld_kick interrupt handler
always be called first, kicking the context loader ON before VBLANK
notification is sent to userspace.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>