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(parent: dc1732b) | patch
net/mlx5e: Fix setting of RS FEC mode
authorAya Levin <ayal@nvidia.com>
Sun, 11 Apr 2021 06:33:12 +0000 (09:33 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 21 Apr 2021 11:00:56 +0000 (13:00 +0200)
commite072247938a8551187f1ad3f9f928d968c96fd0c
tree01f4015dd19efa1c2de767896854cef5f81084e3tree
parentdc1732baa9da5b68621586bf8636ebbc27dc62d2commit | diff
net/mlx5e: Fix setting of RS FEC mode

commit 7a320c9db3e73fb6c4f9a331087df9df18767221 upstream.

Change register setting from bit number to bit mask.

Fixes: b5ede32d3329 ("net/mlx5e: Add support for FEC modes based on 50G per lane links")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Eran Ben Elisha <eranbe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/net/ethernet/mellanox/mlx5/core/en/port.c diff | blob | history