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arm64: dts: ls1028a: Fix incorrect I2C clock divider
authorChuanhua Han <chuanhua.han@nxp.com>
Tue, 6 Aug 2019 08:42:22 +0000 (16:42 +0800)
committerShawn Guo <shawnguo@kernel.org>
Mon, 19 Aug 2019 14:04:49 +0000 (16:04 +0200)
commitced41bb1caefe4f20a03ce14fd252ba1875351da
tree7889d66f20904549bc78b480dbdfb36f2b73b357tree | snapshot
parent52d3406ec72d20f847f108d70b17b2ab844956f6commit | diff
arm64: dts: ls1028a: Fix incorrect I2C clock divider

Ls1028a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi diff | blob | history