MLK-14795 PCI: designware: fail to read the ep mem on rc board
authorRichard Zhu <hongxing.zhu@nxp.com>
Fri, 11 Jan 2019 09:36:14 +0000 (15:06 +0530)
committerLeonard Crestez <leonard.crestez@nxp.com>
Wed, 17 Apr 2019 23:51:34 +0000 (02:51 +0300)
commitcaf8792a292ba39fb5fe703ca9bbdedaa4d93f84
tree9fc7b4253f706241c252f6a2efea84d7f9234cdb
parentfa69b5b25cbc2716832038d2dc6b7b153b5c7a65
MLK-14795 PCI: designware: fail to read the ep mem on rc board

The mem_base address is configured as the outbound
memory region twice when imx pcie ep/rc validation
is enabled.
Mask the one contained in desigware driver to fix
this issue.
Remove the usleep_range usage in designware driver,
since that function maybe used in imx noirq pm
calls.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
use mdelay(LINK_WAIT_IATU) instead of usleep_range while rebase on v4.19
Signed-off-by: Vipul Kumar <vipul_kumar@mentor.com>
drivers/pci/controller/dwc/pcie-designware-host.c
drivers/pci/controller/dwc/pcie-designware.c