MLK-22487-2 clk: imx: imx8mm/n: fix pll mux bit
authorPeng Fan <peng.fan@nxp.com>
Thu, 22 Aug 2019 03:23:42 +0000 (11:23 +0800)
committerPeng Fan <peng.fan@nxp.com>
Mon, 26 Aug 2019 09:25:49 +0000 (17:25 +0800)
commitca6495225c6650a45323125f712b50f90f41871e
tree41052b2a8aba3e655240eb2454cfda0190a076bd
parent47447f63cd800f4c8bfb3f2208ccae014c472a76
MLK-22487-2 clk: imx: imx8mm/n: fix pll mux bit

pll BYPASS bit should be kept inside pll driver for glitchless freq
setting following spec. If exposing the bit, that means pll driver and
clk driver has two paths to touch this bit, which is wrong.

So use EXT_BYPASS bit here.

And drop uneeded set parent, because EXT_BYPASS default is 0.

Suggested-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
drivers/clk/imx/clk-imx8mm.c
drivers/clk/imx/clk-imx8mn.c