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MLK-16750-3 arm: imx6sx: busfreq: lock L2 cache instead of disabling it
authorPeng Fan <peng.fan@nxp.com>
Thu, 2 Nov 2017 01:47:42 +0000 (09:47 +0800)
committerNitin Garg <nitin.garg@nxp.com>
Mon, 19 Mar 2018 20:55:40 +0000 (15:55 -0500)
commitc86b3b532fe6fcac6d6cf6591f2a0e631dc8d711
tree2c5b900044921be49509b4880025048560f5aad7tree | snapshot
parenta66808216bfd3acb4e9ea8b86f752deb787a50f3commit | diff
MLK-16750-3 arm: imx6sx: busfreq: lock L2 cache instead of disabling it

In non-secure mode, L2 cache can NOT be disabled, lock
L2 cache instead of disabling it to avoid L2 cache
access DDR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
arch/arm/mach-imx/ddr3_freq_imx6sx.S diff | blob | history