powerpc/perf: Fix the PMU group constraints for threshold events in power10
authorAthira Rajeev <atrajeev@linux.vnet.ibm.com>
Thu, 26 Nov 2020 16:54:40 +0000 (11:54 -0500)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 30 Dec 2020 10:53:32 +0000 (11:53 +0100)
commitba6a7e6ca5b722792887e9765d673b1953dfbc39
tree26a60ab9984534faab5dcbca16e86d44908a8796
parente559aaba71b9d1eebe8e3ac8627b641686dc04d8
powerpc/perf: Fix the PMU group constraints for threshold events in power10

[ Upstream commit 0263bbb377af0c2d38bc8b2ad2ff147e240094de ]

The PMU group constraints mask for threshold events covers
all thresholding bits which includes threshold control value
(start/stop), select value as well as thresh_cmp value (MMCRA[9:18].
In power9, thresh_cmp bits were part of the event code. But in case
of power10, thresh_cmp bits are not part of event code due to
inclusion of MMCR3 bits. Hence thresh_cmp is not valid for
group constraints for power10.

Fix the PMU group constraints checking for threshold events in
power10 by using constraint mask and value for only threshold control
and select bits.

Fixes: a64e697cef23 ("powerpc/perf: power10 Performance Monitoring support")
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1606409684-1589-4-git-send-email-atrajeev@linux.vnet.ibm.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/powerpc/perf/isa207-common.c
arch/powerpc/perf/isa207-common.h