perf/x86: Expose CPUID enumeration bits for arch LBR
authorKan Liang <kan.liang@linux.intel.com>
Fri, 3 Jul 2020 12:49:14 +0000 (05:49 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Wed, 8 Jul 2020 09:38:53 +0000 (11:38 +0200)
commitaf6cf129706b2f79e12f97e62d977e7f653cdfd1
tree00c229ddf7c9fceecb232b4b6fe7e521a18921da
parentd6a162a41bfd2ff9ea4cbb338d3df6a3f9b7e89f
perf/x86: Expose CPUID enumeration bits for arch LBR

The LBR capabilities of Architecture LBR are retrieved from the CPUID
enumeration once at boot time. The capabilities have to be saved for
future usage.

Several new fields are added into structure x86_pmu to indicate the
capabilities. The fields will be used in the following patches.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1593780569-62993-9-git-send-email-kan.liang@linux.intel.com
arch/x86/events/perf_event.h
arch/x86/include/asm/perf_event.h