MLK-21443: dmaengine: fsl-edma-v3: clear pending irq before request irq

MLK-21443: dmaengine: fsl-edma-v3: clear pending irq before request irq

edma interrupt maybe happened during reboot or watchdog reset, meanwhile
gic never power down on i.mx8QM/QXP, thus the unexpect irq will come in
once edma driver request irq at probe phase. Unfortunately, at that time
that edma channel's power domain which power-up by customer driver such
as audio/uart driver may not be ready, so kernel panic triggered once
touch such edma registers which still not power up in interrupt handler.
Move request irq from probe to alloc dma channel so that edma channel's
power domain has already been powered, besides, clear meaningless
interrupt before request irq.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
(cherry picked from commit 0a0d8f8b944094342fda18f23f3ac13b8a73871d)
Signed-off-by: Arulpandiyan Vadivel <arulpandiyan_vadivel@mentor.com>
Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
(cherry picked from commit a6fa7853b4318a31df8c4f53068e5c68d6e0c4bd)