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MLK-17689-2: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-ADV7535
authorRobert Chiras <robert.chiras@nxp.com>
Tue, 6 Mar 2018 10:40:34 +0000 (12:40 +0200)
committerNitin Garg <nitin.garg@nxp.com>
Tue, 20 Mar 2018 19:56:05 +0000 (14:56 -0500)
commita75009cea30d754d976a9ed962243d862c3c6387
treec476a1740df2f35c1ee9c7c27bbeaea509efefd0tree | snapshot
parent2a40c72ca8e53f4b9f271ae71ddba5b83f2ed673commit | diff
MLK-17689-2: arm64: dts: fsl-imx8mq-evk: Fix clocks for DCSS-ADV7535

Currently, the default clock configuration for DCSS configures the pixel
clock to be sourced from VIDEO_PLL2, but this source cannot be used by
the DSI PHY_REF clock.
So, in order to make DCSS working with DSI, we need to have them both
(DCSS and DSI PHY) use the same clock source: VIDEO_PLL1.

Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-dcss-adv7535.dts diff | blob | history