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MIPS: Ingenic: Fix bugs when detecting L2 cache of JZ4775 and X1000E.
author周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Tue, 22 Sep 2020 01:24:44 +0000 (09:24 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Sun, 27 Sep 2020 08:58:10 +0000 (10:58 +0200)
commita5ce852398a4efc9df4869a71ff45b9dda58882d
tree2c37f74f1639dbd61a73eb8ae9bf6fcd20067fb6tree | snapshot
parenta9fee3a513e560b154ccbe662faa791d5f358875commit | diff
MIPS: Ingenic: Fix bugs when detecting L2 cache of JZ4775 and X1000E.

1.Fix bugs when detecting ways value of JZ4775's L2 cache.
2.Fix bugs when detecting sets value and ways value of X1000E's L2 cache.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/mm/sc-mips.c diff | blob | history