LF-95-3 arm64: imx8qxp-ss-lvds.dtsi: Correct LVDS/MIPI DSI region address and size
authorLiu Ying <victor.liu@nxp.com>
Tue, 3 Dec 2019 12:27:00 +0000 (20:27 +0800)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:21:35 +0000 (11:21 +0800)
commita3a3170a96380eaaa70bc750c6048716075f84eb
tree42a0c1853cb5d7de9caa2c8f66232898e19b9d79
parent2f52a3d58b41d6290144eeca6208a8e6ac484840
LF-95-3 arm64: imx8qxp-ss-lvds.dtsi: Correct LVDS/MIPI DSI region address and size

The LVDS/MIPI DSI region is the CSR(Control Status Registers) space.
The spec tells us that the CSR start address is 0x1000 and end address
is 0x1FFF according to the subsystem start address.  However, it turns
out some space are inaccessible, which would accidently cause system
hang via kernel regmap debugfs.  This patch corrects the LVDS/MIPI DSI
region start address and chooses a sensible size, which makes sure all
exposed registers are accessible.

Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi