MLK-20420 ARM: dts: imx7ulp-evk: add delay cell for DDR50/DDR52 mode
authorHaibo Chen <haibo.chen@nxp.com>
Fri, 15 Nov 2019 12:18:07 +0000 (20:18 +0800)
committerDong Aisheng <aisheng.dong@nxp.com>
Mon, 14 Dec 2020 03:21:10 +0000 (11:21 +0800)
commit93b853b81a79310505254c269e6c94c2a70a3206
tree2ee6d90b77aea301d8cabf26bbad7f3bc6aae940
parentbff387f850ab3fbc48c2b3adebf5aed700d1ed22
MLK-20420 ARM: dts: imx7ulp-evk: add delay cell for DDR50/DDR52 mode

We find some imx7ulp evk board, SD card work in DDR50 mode will meet
data CRC error. Only some board has this issue. And eMMC DDR50 mode
also has this issue on these boards. For DDR50, do tuning can fix
this issue, but eMMC DDR52 do not support tuning. So this patch
manually add the delay cell on the fixed clock (FBCLK_SEL = 0).
Currently, add 15 delay cell, which can make DDR50/DDR52 works stable
on all imx7ulp evk board.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
(cherry picked from commit ef369313de747251ff11c108e7fd5bf2b92df603)

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
arch/arm/boot/dts/imx7ulp-evk.dts