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(parent: 2dd4923) | patch
MLK-16724 imx8mq: clock: Fix FRAC PLL caculation issue
authorYe Li <ye.li@nxp.com>
Mon, 30 Oct 2017 02:53:21 +0000 (21:53 -0500)
committerJason Liu <jason.hui.liu@nxp.com>
Thu, 2 Nov 2017 18:37:28 +0000 (02:37 +0800)
commit889fef962ab4b86944735b8e7d993ed93bbc57ec
tree3f07c1d8a391e0eb6ce8542d06b29541d13acc7btree | snapshot
parent2dd49234526bf5d60df4fc40465503cdff733ea7commit | diff
MLK-16724 imx8mq: clock: Fix FRAC PLL caculation issue

According to the FRAC PLL formula, DIVF_VAL = 1 + DIVFI + (DIVFF/224).
But in decode_frac_pll, the DIVFI and DIVFF are both added with 1. Fix it to
align with the formula.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
arch/arm/cpu/armv8/imx8m/clock.c diff | blob | history