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powerpc/64s/radix: optimise pte_update
authorNicholas Piggin <npiggin@gmail.com>
Fri, 1 Jun 2018 10:01:20 +0000 (20:01 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sun, 3 Jun 2018 10:40:36 +0000 (20:40 +1000)
commit85bcfaf69cbd610fdfac3351cf385809a2f4a93b
tree0c3ec307217742cf1857462744ca588ecca006e9tree | snapshot
parentf1cb8f9beba8699dd1b4518418191499e53f7b17commit | diff
powerpc/64s/radix: optimise pte_update

Implementing pte_update with pte_xchg (which uses cmpxchg) is
inefficient. A single larx/stcx. works fine, no need for the less
efficient cmpxchg sequence.

Then remove the memory barriers from the operation. There is a
requirement for TLB flushing to load mm_cpumask after the store
that reduces pte permissions, which is moved into the TLB flush
code.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/include/asm/book3s/64/radix.h diff | blob | history
arch/powerpc/mm/mmu_context.c diff | blob | history
arch/powerpc/mm/tlb-radix.c diff | blob | history