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MLK-24900 imx8mp ddr4: Align ddr4 QoS to lpddr4
authorJian Li <jian.li@nxp.com>
Mon, 19 Oct 2020 02:13:01 +0000 (10:13 +0800)
committerYe Li <ye.li@nxp.com>
Thu, 29 Apr 2021 10:26:19 +0000 (03:26 -0700)
commit829895df36b0e80e090ed1befcb1a6e4c7ad2e82
treed1961c3548447fe456ee7ee3e94d5cf94a2cabc9tree | snapshot
parent84ef726d075974e9eb87ea84023eee102e5121d4commit | diff
MLK-24900 imx8mp ddr4: Align ddr4 QoS to lpddr4

1. align ddr4 Q0S settings to lpddr4
2. adjust PERFHPR1, PERFLPR1, PERFWR1 to reduce HPR,LPR, W
   starving time to avoid display underrun

Signed-off-by: Jian Li <jian.li@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit f0905916886bd45d1dc5d55b25839106457124f5)
(cherry picked from commit 318bc283cba3f71bcccc9839806a485abd07ba1b)
board/freescale/imx8mp_evk/ddr4_timing.c diff | blob | history