MLK-25454-1 dts: iMX8MP_DDR4: Set LCDIF/HDMI AXI clock rate to nominal mode
authorSandor Yu <Sandor.yu@nxp.com>
Tue, 20 Apr 2021 03:27:15 +0000 (11:27 +0800)
committerSandor Yu <Sandor.yu@nxp.com>
Tue, 27 Apr 2021 01:58:53 +0000 (09:58 +0800)
commit81a50fa590d5949505c34c68a8ff6f323514e176
tree830047a272fa78824e89699e4594a5783e74d73c
parentb1124dd67416ddbd060e20040bb2e1b42d46d55f
MLK-25454-1 dts: iMX8MP_DDR4: Set LCDIF/HDMI AXI clock rate to nominal mode

According IMX8MPIEC, both LCIDF and HDMI AXI clock rate should set
to nominal mode for iMX8MP DDR4 board.
Clock root         Nominal mode Overdrive mode   Unit
MEDIA_AXI_CLK_ROOT    400           500           MHz
HDMI_AXI_CLK_ROOT     400           500           MHz

Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 4e698891f8d8c6bf6a3f6bf870bef1bb603dcddd)
arch/arm64/boot/dts/freescale/imx8mp-ddr4-evk.dts