MA-11120 Fix screen mess with colorful grids issue on mx6dl ard board
The issue is reported on mx6dl ard board after add ion cacheable memory
support in patch "MA-10928 Add system contiguous heap to ion", root cause
is GPU will enable MMU when physical address large than 0x80000000.
ARD board has 2GB memory if not set base address GPU MMU will be enabled
and when GPU mapped address pass to 2D there will have problem. Fix the
issue by set phys_baseaddr=256M in mx6dl board dts, mx6q board already
set phys_baseaddr.
Change-Id: I11935900801ffe811a2c12f37ecbac13a34245f6
Signed-off-by: Richard Liu <xuegang.liu@nxp.com>